STM32F4xx_HAL_Driver  1.8.3
stm32f4xx_ll_utils.h
Go to the documentation of this file.
1 
31 /* Define to prevent recursive inclusion -------------------------------------*/
32 #ifndef __STM32F4xx_LL_UTILS_H
33 #define __STM32F4xx_LL_UTILS_H
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
39 /* Includes ------------------------------------------------------------------*/
40 #include "stm32f4xx.h"
41 
50 /* Private types -------------------------------------------------------------*/
51 /* Private variables ---------------------------------------------------------*/
52 
53 /* Private constants ---------------------------------------------------------*/
58 /* Max delay can be used in LL_mDelay */
59 #define LL_MAX_DELAY 0xFFFFFFFFU
60 
64 #define UID_BASE_ADDRESS UID_BASE
65 
69 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
70 
74 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
75 
80 /* Private macros ------------------------------------------------------------*/
87 /* Exported types ------------------------------------------------------------*/
94 typedef struct
95 {
96  uint32_t PLLM;
102  uint32_t PLLN;
109  uint32_t PLLP;
115 
119 typedef struct
120 {
121  uint32_t AHBCLKDivider;
127  uint32_t APB1CLKDivider;
133  uint32_t APB2CLKDivider;
140 
145 /* Exported constants --------------------------------------------------------*/
153 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U
154 #define LL_UTILS_HSEBYPASS_ON 0x00000001U
162 #define LL_UTILS_PACKAGETYPE_WLCSP36_UFQFPN48_LQFP64 0x00000000U
163 #define LL_UTILS_PACKAGETYPE_WLCSP168_FBGA169_LQFP100_LQFP64_UFQFPN48 0x00000100U
164 #define LL_UTILS_PACKAGETYPE_WLCSP64_WLCSP81_LQFP176_UFBGA176 0x00000200U
165 #define LL_UTILS_PACKAGETYPE_LQFP144_UFBGA144_UFBGA144_UFBGA100 0x00000300U
166 #define LL_UTILS_PACKAGETYPE_LQFP100_LQFP208_TFBGA216 0x00000400U
167 #define LL_UTILS_PACKAGETYPE_LQFP208_TFBGA216 0x00000500U
168 #define LL_UTILS_PACKAGETYPE_TQFP64_UFBGA144_LQFP144 0x00000700U
177 /* Exported macro ------------------------------------------------------------*/
178 
179 /* Exported functions --------------------------------------------------------*/
192 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
193 {
194  return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
195 }
196 
201 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
202 {
203  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
204 }
205 
210 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
211 {
212  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
213 }
214 
221 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
222 {
223  return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0xFFFF);
224 }
225 
239 __STATIC_INLINE uint32_t LL_GetPackageType(void)
240 {
241  return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x0700U);
242 }
243 
260 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
261 {
262  /* Configure the SysTick to have interrupt in 1ms time base */
263  SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
264  SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
265  SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
266  SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
267 }
268 
269 void LL_Init1msTick(uint32_t HCLKFrequency);
270 void LL_mDelay(uint32_t Delay);
271 
280 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
281 ErrorStatus LL_SetFlashLatency(uint32_t HCLK_Frequency);
282 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
283  LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
284 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
285  LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
286 
303 #ifdef __cplusplus
304 }
305 #endif
306 
307 #endif /* __STM32F4xx_LL_UTILS_H */
__STATIC_INLINE uint32_t LL_GetFlashSize(void)
Get Flash memory size.
__STATIC_INLINE uint32_t LL_GetUID_Word0(void)
Get Word0 of the unique device identifier (UID based on 96 bits)
__STATIC_INLINE uint32_t LL_GetUID_Word1(void)
Get Word1 of the unique device identifier (UID based on 96 bits)
__STATIC_INLINE uint32_t LL_GetUID_Word2(void)
Get Word2 of the unique device identifier (UID based on 96 bits)
__STATIC_INLINE uint32_t LL_GetPackageType(void)
Get Package type.
void LL_SetSystemCoreClock(uint32_t HCLKFrequency)
This function sets directly SystemCoreClock CMSIS variable.
ErrorStatus LL_SetFlashLatency(uint32_t HCLK_Frequency)
Update number of Flash wait states in line with new frequency and current voltage range.
ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
This function configures system clock at maximum frequency with HSI as clock source of the PLL.
ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
This function configures system clock with HSE as clock source of the PLL.
__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
This function configures the Cortex-M SysTick source of the time base.
void LL_Init1msTick(uint32_t HCLKFrequency)
This function configures the Cortex-M SysTick source to have 1ms time base.
void LL_mDelay(uint32_t Delay)
This function provides accurate delay (in milliseconds) based on SysTick counter flag.
UTILS System, AHB and APB buses clock configuration structure definition.
UTILS PLL structure definition.