172 #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
179 static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx);
207 HAL_StatusTypeDef
SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
212 assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
213 assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
214 assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
215 assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
216 assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
217 assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
218 assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
221 tmpreg |= (Init.ClockEdge |\
223 Init.ClockPowerSave |\
225 Init.HardwareFlowControl |\
230 MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
263 return (SDIOx->FIFO);
275 SDIOx->FIFO = *pWriteData;
307 SDIOx->POWER = SDIO_POWER_PWRCTRL;
320 SDIOx->POWER = (uint32_t)0x00000000;
336 return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
352 assert_param(IS_SDIO_CMD_INDEX(Command->
CmdIndex));
353 assert_param(IS_SDIO_RESPONSE(Command->
Response));
355 assert_param(IS_SDIO_CPSM(Command->
CPSM));
361 tmpreg |= (uint32_t)(Command->
CmdIndex |\
367 MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
379 return (uint8_t)(SDIOx->RESPCMD);
399 assert_param(IS_SDIO_RESP(Response));
402 tmp = (uint32_t)(&(SDIOx->RESP1)) + Response;
404 return (*(__IO uint32_t *) tmp);
420 assert_param(IS_SDIO_DATA_LENGTH(Data->
DataLength));
422 assert_param(IS_SDIO_TRANSFER_DIR(Data->
TransferDir));
423 assert_param(IS_SDIO_TRANSFER_MODE(Data->
TransferMode));
424 assert_param(IS_SDIO_DPSM(Data->
DPSM));
439 MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
452 return (SDIOx->DCOUNT);
462 return (SDIOx->FIFO);
477 assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
480 MODIFY_REG(SDIOx->DCTRL, SDIO_DCTRL_RWMOD, SDIO_ReadWaitMode);
515 sdmmc_cmdinit.
Argument = (uint32_t)BlockSize;
516 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
517 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
519 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
539 sdmmc_cmdinit.
Argument = (uint32_t)ReadAdd;
540 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
541 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
543 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
547 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
563 sdmmc_cmdinit.
Argument = (uint32_t)ReadAdd;
564 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
565 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
567 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
571 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT);
587 sdmmc_cmdinit.
Argument = (uint32_t)WriteAdd;
588 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
589 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
591 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
595 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
611 sdmmc_cmdinit.
Argument = (uint32_t)WriteAdd;
612 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
613 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
615 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
619 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT);
635 sdmmc_cmdinit.
Argument = (uint32_t)StartAdd;
636 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START;
637 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
639 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
643 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
659 sdmmc_cmdinit.
Argument = (uint32_t)EndAdd;
660 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END;
661 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
663 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
667 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
683 sdmmc_cmdinit.
Argument = (uint32_t)StartAdd;
684 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_ERASE_GRP_START;
685 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
687 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
691 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
707 sdmmc_cmdinit.
Argument = (uint32_t)EndAdd;
708 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_ERASE_GRP_END;
709 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
711 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
732 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_ERASE;
733 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
735 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
756 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
757 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
759 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
763 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, SDIO_STOPTRANSFERTIMEOUT);
780 sdmmc_cmdinit.
Argument = (uint32_t)Addr;
781 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
782 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
784 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
788 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT);
804 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
805 sdmmc_cmdinit.
Response = SDIO_RESPONSE_NO;
807 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
811 errorstate = SDMMC_GetCmdError(SDIOx);
831 sdmmc_cmdinit.
Argument = SDMMC_CHECK_PATTERN;
832 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
833 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
835 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
857 sdmmc_cmdinit.
Argument = (uint32_t)Argument;
858 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_APP_CMD;
859 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
861 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
885 sdmmc_cmdinit.
Argument = SDMMC_VOLTAGE_WINDOW_SD | Argument;
886 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
887 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
889 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
909 sdmmc_cmdinit.
Argument = (uint32_t)BusWidth;
910 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
911 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
913 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
917 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT);
934 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
935 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
937 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
941 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT);
958 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_ALL_SEND_CID;
959 sdmmc_cmdinit.
Response = SDIO_RESPONSE_LONG;
961 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
983 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SEND_CSD;
984 sdmmc_cmdinit.
Response = SDIO_RESPONSE_LONG;
986 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
1004 uint32_t errorstate;
1008 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SET_REL_ADDR;
1009 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
1011 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
1029 uint32_t errorstate;
1032 sdmmc_cmdinit.
Argument = ((uint32_t)RCA << 16U);
1033 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SET_REL_ADDR;
1034 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
1036 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
1054 uint32_t errorstate;
1057 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SEND_STATUS;
1058 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
1060 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
1077 uint32_t errorstate;
1080 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SD_APP_STATUS;
1081 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
1083 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
1087 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_STATUS, SDIO_CMDTIMEOUT);
1102 uint32_t errorstate;
1105 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_SEND_OP_COND;
1106 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
1108 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
1126 uint32_t errorstate;
1131 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_HS_SWITCH;
1132 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
1134 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
1152 uint32_t errorstate;
1156 sdmmc_cmdinit.
CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
1157 sdmmc_cmdinit.
Response = SDIO_RESPONSE_SHORT;
1159 sdmmc_cmdinit.
CPSM = SDIO_CPSM_ENABLE;
1163 errorstate =
SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SEND_EXT_CSD,SDIO_CMDTIMEOUT);
1193 uint32_t response_r1;
1198 uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
1204 return SDMMC_ERROR_TIMEOUT;
1206 sta_reg = SDIOx->STA;
1207 }
while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
1208 ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
1210 if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1212 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
1214 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1216 else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
1218 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
1220 return SDMMC_ERROR_CMD_CRC_FAIL;
1228 __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
1233 return SDMMC_ERROR_CMD_CRC_FAIL;
1239 if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
1241 return SDMMC_ERROR_NONE;
1243 else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
1245 return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
1247 else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
1249 return SDMMC_ERROR_ADDR_MISALIGNED;
1251 else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
1253 return SDMMC_ERROR_BLOCK_LEN_ERR;
1255 else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
1257 return SDMMC_ERROR_ERASE_SEQ_ERR;
1259 else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
1261 return SDMMC_ERROR_BAD_ERASE_PARAM;
1263 else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
1265 return SDMMC_ERROR_WRITE_PROT_VIOLATION;
1267 else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
1269 return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
1271 else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
1273 return SDMMC_ERROR_COM_CRC_FAILED;
1275 else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
1277 return SDMMC_ERROR_ILLEGAL_CMD;
1279 else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
1281 return SDMMC_ERROR_CARD_ECC_FAILED;
1283 else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
1285 return SDMMC_ERROR_CC_ERR;
1287 else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
1289 return SDMMC_ERROR_STREAM_READ_UNDERRUN;
1291 else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
1293 return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
1295 else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
1297 return SDMMC_ERROR_CID_CSD_OVERWRITE;
1299 else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
1301 return SDMMC_ERROR_WP_ERASE_SKIP;
1303 else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
1305 return SDMMC_ERROR_CARD_ECC_DISABLED;
1307 else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
1309 return SDMMC_ERROR_ERASE_RESET;
1311 else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
1313 return SDMMC_ERROR_AKE_SEQ_ERR;
1317 return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
1331 uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1337 return SDMMC_ERROR_TIMEOUT;
1339 sta_reg = SDIOx->STA;
1340 }
while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
1341 ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
1343 if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1345 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
1347 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1349 else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
1351 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
1353 return SDMMC_ERROR_CMD_CRC_FAIL;
1359 __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
1362 return SDMMC_ERROR_NONE;
1375 uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1381 return SDMMC_ERROR_TIMEOUT;
1383 sta_reg = SDIOx->STA;
1384 }
while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
1385 ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
1387 if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1389 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
1391 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1396 __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
1399 return SDMMC_ERROR_NONE;
1412 uint32_t response_r1;
1417 uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1423 return SDMMC_ERROR_TIMEOUT;
1425 sta_reg = SDIOx->STA;
1426 }
while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
1427 ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
1429 if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1431 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
1433 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1435 else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
1437 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
1439 return SDMMC_ERROR_CMD_CRC_FAIL;
1449 return SDMMC_ERROR_CMD_CRC_FAIL;
1453 __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
1458 if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
1460 *pRCA = (uint16_t) (response_r1 >> 16);
1462 return SDMMC_ERROR_NONE;
1464 else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
1466 return SDMMC_ERROR_ILLEGAL_CMD;
1468 else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
1470 return SDMMC_ERROR_COM_CRC_FAILED;
1474 return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
1488 uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1494 return SDMMC_ERROR_TIMEOUT;
1496 sta_reg = SDIOx->STA;
1497 }
while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
1498 ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
1500 if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1503 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
1505 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1507 else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
1510 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
1512 return SDMMC_ERROR_CMD_CRC_FAIL;
1519 if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND))
1522 __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
1525 return SDMMC_ERROR_NONE;
1543 static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx)
1547 uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1553 return SDMMC_ERROR_TIMEOUT;
1556 }
while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT));
1559 __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
1561 return SDMMC_ERROR_NONE;
HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
Initializes the SDMMC according to the specified parameters in the SDMMC_InitTypeDef and create the a...
uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
Read data (word) from Rx FIFO in blocking mode (polling)
HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
Write data (word) to Tx FIFO in blocking mode (polling)
HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
Set SDMMC Power state to OFF.
uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
Get SDMMC Power state.
HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
Configure the SDMMC command path according to the specified parameters in SDIO_CmdInitTypeDef structu...
HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
Set SDMMC Power state to ON.
HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef *Data)
Configure the SDMMC data path according to the specified parameters in the SDIO_DataInitTypeDef.
uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
Return the command index of last command for which response received.
uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
Get the FIFO data.
uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
Returns number of remaining data bytes to be transferred.
uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
Return the response received from the card for the last command.
HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode)
Sets one of the two options of inserting read wait interval.
uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument)
Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH command.
uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr)
Send the Select Deselect command and check the response.
uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize)
Send the Data Block Length command and check the response.
uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
Send the Write Single Block command and check the response.
uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
Send the Application command to verify that that the next command is an application specific com-mand...
uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
Send the Start Address Erase command and check the response.
uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx)
Send the Operating Condition command and check the response.
uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx)
Send the Go Idle State command and check the response.
uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth)
Send the Bus Width command and check the response.
uint32_t SDMMC_CmdSetRelAddMmc(SDIO_TypeDef *SDIOx, uint16_t RCA)
Send the Set Relative Address command to MMC card (not SD card).
uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
Send the Write Multi Block command and check the response.
uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx)
Send the Erase command and check the response.
uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
Send the End Address Erase command and check the response.
uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx)
Send the Stop Transfer command and check the response.
uint32_t SDMMC_CmdSendEXTCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
Send the Send EXT_CSD command and check the response.
uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
Send the Start Address Erase command for SD and check the response.
uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx)
Send the Send SCR command and check the response.
uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx)
Send the Status register command and check the response.
uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
Send the Send CSD command and check the response.
uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
Send the Read Multi Block command and check the response.
uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument)
Sends host capacity support information and activates the card's initialization process....
uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx)
Send the Send CID command and check the response.
uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA)
Send the Send CSD command and check the response.
uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
Send the Read Single Block command and check the response.
uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
Send the End Address Erase command for SD and check the response.
uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
Send the command asking the accessed card to send its operating condition register (OCR)
uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument)
Send the Status command and check the response.
uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx)
Checks for error conditions for R7 response.
uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx)
Checks for error conditions for R2 (CID or CSD) response.
uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA)
Checks for error conditions for R6 (RCA) response.
uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx)
Checks for error conditions for R3 (OCR) response.
uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout)
Checks for error conditions for R1 response.
This file contains all the functions prototypes for the HAL module driver.
uint32_t WaitForInterrupt
SDMMC Command Control structure.
SDMMC Data Control structure.