20 #ifndef STM32F4xx_LL_IWDG_H
21 #define STM32F4xx_LL_IWDG_H
28 #include "stm32f4xx.h"
47 #define LL_IWDG_KEY_RELOAD 0x0000AAAAU
48 #define LL_IWDG_KEY_ENABLE 0x0000CCCCU
49 #define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U
50 #define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U
67 #define LL_IWDG_SR_PVU IWDG_SR_PVU
68 #define LL_IWDG_SR_RVU IWDG_SR_RVU
76 #define LL_IWDG_PRESCALER_4 0x00000000U
77 #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0)
78 #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1)
79 #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0)
80 #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2)
81 #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0)
82 #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1)
107 #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
115 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
142 WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
153 WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
164 WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
175 WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
194 WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
212 return (READ_REG(IWDGx->PR));
224 WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
235 return (READ_REG(IWDGx->RLR));
254 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
265 return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
277 return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U) ? 1UL : 0UL);
__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
Start the Independent Watchdog.
__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
Select the prescaler of the IWDG @rmtoll PR PR LL_IWDG_SetPrescaler.
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
Get the specified IWDG down-counter reload value @rmtoll RLR RL LL_IWDG_GetReloadCounter.
__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers @rmtoll KR KEY LL_IWDG_DisableWrite...
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers @rmtoll KR KEY LL_IWDG_EnableWriteAc...
__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
Specify the IWDG down-counter reload value @rmtoll RLR RL LL_IWDG_SetReloadCounter.
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
Get the selected prescaler of the IWDG @rmtoll PR PR LL_IWDG_GetPrescaler.
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
Reloads IWDG counter with value defined in the reload register @rmtoll KR KEY LL_IWDG_ReloadCounter.
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
Check if flag Reload Value Update is set or not @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU.
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
Check if flag Prescaler Value Update is set or not @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU.
__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
Check if flags Prescaler & Reload Value Update are reset or not @rmtoll SR PVU LL_IWDG_IsReady SR RV...