STM32F4xx_HAL_Driver
1.8.3
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FMC Low Layer HAL module driver. More...
Go to the source code of this file.
Functions | |
HAL_StatusTypeDef | FMC_NORSRAM_Init (FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_InitTypeDef *Init) |
Initialize the FMC_NORSRAM device according to the specified control parameters in the FMC_NORSRAM_InitTypeDef. More... | |
HAL_StatusTypeDef | FMC_NORSRAM_DeInit (FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank) |
DeInitialize the FMC_NORSRAM peripheral. More... | |
HAL_StatusTypeDef | FMC_NORSRAM_Timing_Init (FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) |
Initialize the FMC_NORSRAM Timing according to the specified parameters in the FMC_NORSRAM_TimingTypeDef. More... | |
HAL_StatusTypeDef | FMC_NORSRAM_Extended_Timing_Init (FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode) |
Initialize the FMC_NORSRAM Extended mode Timing according to the specified parameters in the FMC_NORSRAM_TimingTypeDef. More... | |
HAL_StatusTypeDef | FMC_NORSRAM_WriteOperation_Enable (FMC_NORSRAM_TypeDef *Device, uint32_t Bank) |
Enables dynamically FMC_NORSRAM write operation. More... | |
HAL_StatusTypeDef | FMC_NORSRAM_WriteOperation_Disable (FMC_NORSRAM_TypeDef *Device, uint32_t Bank) |
Disables dynamically FMC_NORSRAM write operation. More... | |
HAL_StatusTypeDef | FMC_NAND_Init (FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init) |
Initializes the FMC_NAND device according to the specified control parameters in the FMC_NAND_HandleTypeDef. More... | |
HAL_StatusTypeDef | FMC_NAND_CommonSpace_Timing_Init (FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) |
Initializes the FMC_NAND Common space Timing according to the specified parameters in the FMC_NAND_PCC_TimingTypeDef. More... | |
HAL_StatusTypeDef | FMC_NAND_AttributeSpace_Timing_Init (FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank) |
Initializes the FMC_NAND Attribute space Timing according to the specified parameters in the FMC_NAND_PCC_TimingTypeDef. More... | |
HAL_StatusTypeDef | FMC_NAND_DeInit (FMC_NAND_TypeDef *Device, uint32_t Bank) |
DeInitializes the FMC_NAND device. More... | |
HAL_StatusTypeDef | FMC_NAND_ECC_Enable (FMC_NAND_TypeDef *Device, uint32_t Bank) |
Enables dynamically FMC_NAND ECC feature. More... | |
HAL_StatusTypeDef | FMC_NAND_ECC_Disable (FMC_NAND_TypeDef *Device, uint32_t Bank) |
Disables dynamically FMC_NAND ECC feature. More... | |
HAL_StatusTypeDef | FMC_NAND_GetECC (FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout) |
Disables dynamically FMC_NAND ECC feature. More... | |
HAL_StatusTypeDef | FMC_PCCARD_Init (FMC_PCCARD_TypeDef *Device, FMC_PCCARD_InitTypeDef *Init) |
Initializes the FMC_PCCARD device according to the specified control parameters in the FMC_PCCARD_HandleTypeDef. More... | |
HAL_StatusTypeDef | FMC_PCCARD_CommonSpace_Timing_Init (FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing) |
Initializes the FMC_PCCARD Common space Timing according to the specified parameters in the FMC_NAND_PCC_TimingTypeDef. More... | |
HAL_StatusTypeDef | FMC_PCCARD_AttributeSpace_Timing_Init (FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing) |
Initializes the FMC_PCCARD Attribute space Timing according to the specified parameters in the FMC_NAND_PCC_TimingTypeDef. More... | |
HAL_StatusTypeDef | FMC_PCCARD_IOSpace_Timing_Init (FMC_PCCARD_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing) |
Initializes the FMC_PCCARD IO space Timing according to the specified parameters in the FMC_NAND_PCC_TimingTypeDef. More... | |
HAL_StatusTypeDef | FMC_PCCARD_DeInit (FMC_PCCARD_TypeDef *Device) |
DeInitializes the FMC_PCCARD device. More... | |
HAL_StatusTypeDef | FMC_SDRAM_Init (FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init) |
Initializes the FMC_SDRAM device according to the specified control parameters in the FMC_SDRAM_InitTypeDef. More... | |
HAL_StatusTypeDef | FMC_SDRAM_Timing_Init (FMC_SDRAM_TypeDef *Device, FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank) |
Initializes the FMC_SDRAM device timing according to the specified parameters in the FMC_SDRAM_TimingTypeDef. More... | |
HAL_StatusTypeDef | FMC_SDRAM_DeInit (FMC_SDRAM_TypeDef *Device, uint32_t Bank) |
DeInitializes the FMC_SDRAM peripheral. More... | |
HAL_StatusTypeDef | FMC_SDRAM_WriteProtection_Enable (FMC_SDRAM_TypeDef *Device, uint32_t Bank) |
Enables dynamically FMC_SDRAM write protection. More... | |
HAL_StatusTypeDef | FMC_SDRAM_WriteProtection_Disable (FMC_SDRAM_TypeDef *Device, uint32_t Bank) |
Disables dynamically FMC_SDRAM write protection. More... | |
HAL_StatusTypeDef | FMC_SDRAM_SendCommand (FMC_SDRAM_TypeDef *Device, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout) |
Send Command to the FMC SDRAM bank. More... | |
HAL_StatusTypeDef | FMC_SDRAM_ProgramRefreshRate (FMC_SDRAM_TypeDef *Device, uint32_t RefreshRate) |
Program the SDRAM Memory Refresh rate. More... | |
HAL_StatusTypeDef | FMC_SDRAM_SetAutoRefreshNumber (FMC_SDRAM_TypeDef *Device, uint32_t AutoRefreshNumber) |
Set the Number of consecutive SDRAM Memory auto Refresh commands. More... | |
uint32_t | FMC_SDRAM_GetModeStatus (const FMC_SDRAM_TypeDef *Device, uint32_t Bank) |
Returns the indicated FMC SDRAM bank mode status. More... | |
FMC Low Layer HAL module driver.
Copyright (c) 2016 STMicroelectronics. All rights reserved.
This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.
============================================================================== ##### FMC peripheral features ##### ============================================================================== [..] The Flexible memory controller (FMC) includes following memory controllers: (+) The NOR/PSRAM memory controller (+) The NAND/PC Card memory controller (+) The Synchronous DRAM (SDRAM) controller [..] The FMC functional block makes the interface with synchronous and asynchronous static memories, SDRAM memories, and 16-bit PC memory cards. Its main purposes are: (+) to translate AHB transactions into the appropriate external device protocol (+) to meet the access time requirements of the external memory devices [..] All external memories share the addresses, data and control signals with the controller. Each external device is accessed by means of a unique Chip Select. The FMC performs only one access at a time to an external device. The main features of the FMC controller are the following: (+) Interface with static-memory mapped devices including: (++) Static random access memory (SRAM) (++) Read-only memory (ROM) (++) NOR Flash memory/OneNAND Flash memory (++) PSRAM (4 memory banks) (++) 16-bit PC Card compatible devices (++) Two banks of NAND Flash memory with ECC hardware to check up to 8 Kbytes of data (+) Interface with synchronous DRAM (SDRAM) memories (+) Independent Chip Select control for each memory bank (+) Independent configuration for each memory bank
Definition in file stm32f4xx_ll_fmc.c.