STM32F4xx_HAL_Driver  1.8.3
stm32f4xx_ll_dma2d.h
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1 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32F4xx_LL_DMA2D_H
21 #define STM32F4xx_LL_DMA2D_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32f4xx.h"
29 
34 #if defined (DMA2D)
35 
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44 #if defined(USE_FULL_LL_DRIVER)
52 #endif /*USE_FULL_LL_DRIVER*/
53 
54 /* Exported types ------------------------------------------------------------*/
55 #if defined(USE_FULL_LL_DRIVER)
63 typedef struct
64 {
65  uint32_t Mode;
71  uint32_t ColorMode;
77  uint32_t OutputBlue;
93  uint32_t OutputGreen;
109  uint32_t OutputRed;
125  uint32_t OutputAlpha;
147  uint32_t LineOffset;
153  uint32_t NbrOfLines;
168 
172 typedef struct
173 {
174  uint32_t MemoryAddress;
182  uint32_t LineOffset;
189  uint32_t ColorMode;
196  uint32_t CLUTColorMode;
203  uint32_t CLUTSize;
210  uint32_t AlphaMode;
217  uint32_t Alpha;
224  uint32_t Blue;
231  uint32_t Green;
238  uint32_t Red;
245  uint32_t CLUTMemoryAddress;
256 
260 typedef struct
261 {
262  uint32_t ColorMode;
268  uint32_t OutputBlue;
284  uint32_t OutputGreen;
300  uint32_t OutputRed;
316  uint32_t OutputAlpha;
330 
334 #endif /* USE_FULL_LL_DRIVER */
335 
336 /* Exported constants --------------------------------------------------------*/
345 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF
346 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF
347 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF
348 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF
349 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF
350 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF
359 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE
360 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE
361 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE
362 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE
363 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE
364 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE
372 #define LL_DMA2D_MODE_M2M 0x00000000U
373 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0
374 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1
375 #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE
383 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U
384 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0
385 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1
386 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1)
387 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2
395 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U
396 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0
397 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1
398 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1)
399 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2
400 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2)
401 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2)
402 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2)
403 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3
404 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3)
405 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3)
413 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U
414 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0
416 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1
429 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U
430 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM
440 /* Exported macro ------------------------------------------------------------*/
456 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
457 
464 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
473 /* Exported functions --------------------------------------------------------*/
488 __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
489 {
490  SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
491 }
492 
499 __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
500 {
501  return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
502 }
503 
511 __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
512 {
513  MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
514 }
515 
523 __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
524 {
525  CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
526 }
527 
536 __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
537 {
538  return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
539 }
540 
548 __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
549 {
550  MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
551 }
552 
561 __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
562 {
563  return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
564 }
565 
577 __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
578 {
579  MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
580 }
581 
592 __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
593 {
594  return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
595 }
596 
609 __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
610 {
611  MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
612 }
613 
625 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
626 {
627  return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
628 }
629 
630 
631 
632 
640 __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
641 {
642  MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
643 }
644 
651 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
652 {
653  return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
654 }
655 
663 __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
664 {
665  MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
666 }
667 
674 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
675 {
676  return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
677 }
678 
686 __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
687 {
688  MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
689 }
690 
697 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
698 {
699  return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
700 }
701 
709 __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
710 {
711  LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
712 }
713 
720 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
721 {
722  return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
723 }
724 
739 __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
740 {
741  MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
742  OutputColor);
743 }
744 
757 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
758 {
759  return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
760  (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
761 }
762 
770 __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
771 {
772  MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
773 }
774 
781 __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
782 {
783  return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
784 }
785 
793 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
794 {
795  MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
796 }
797 
804 __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
805 {
806  return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
807 }
808 
815 __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
816 {
817  SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
818 }
819 
826 __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
827 {
828  CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
829 }
830 
837 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
838 {
839  return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
840 }
841 
853 __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
854 {
855  LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
856 }
857 
864 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
865 {
866  return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
867 }
868 
875 __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
876 {
877  SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
878 }
879 
886 __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
887 {
888  return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
889 }
890 
909 __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
910 {
911  MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
912 }
913 
931 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
932 {
933  return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
934 }
935 
946 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
947 {
948  MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
949 }
950 
960 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
961 {
962  return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
963 }
964 
972 __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
973 {
974  MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
975 }
976 
983 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
984 {
985  return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
986 }
987 
988 
996 __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
997 {
998  MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
999 }
1000 
1007 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
1008 {
1009  return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
1010 }
1011 
1023 __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
1024 {
1025  MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
1026  ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
1027 }
1028 
1036 __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
1037 {
1038  MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
1039 }
1040 
1047 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
1048 {
1049  return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
1050 }
1051 
1059 __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
1060 {
1061  MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
1062 }
1063 
1070 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
1071 {
1072  return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
1073 }
1074 
1082 __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
1083 {
1084  MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
1085 }
1086 
1093 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
1094 {
1095  return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
1096 }
1097 
1105 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
1106 {
1107  LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
1108 }
1109 
1116 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
1117 {
1118  return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
1119 }
1120 
1128 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
1129 {
1130  MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
1131 }
1132 
1139 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
1140 {
1141  return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
1142 }
1143 
1153 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
1154 {
1155  MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
1156 }
1157 
1166 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
1167 {
1168  return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
1169 }
1170 
1186 __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
1187 {
1188  LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
1189 }
1190 
1197 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
1198 {
1199  return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
1200 }
1201 
1208 __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
1209 {
1210  SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
1211 }
1212 
1219 __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
1220 {
1221  return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
1222 }
1223 
1242 __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
1243 {
1244  MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
1245 }
1246 
1264 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
1265 {
1266  return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
1267 }
1268 
1279 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
1280 {
1281  MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
1282 }
1283 
1293 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
1294 {
1295  return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
1296 }
1297 
1305 __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
1306 {
1307  MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
1308 }
1309 
1316 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
1317 {
1318  return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
1319 }
1320 
1321 
1329 __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
1330 {
1331  MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
1332 }
1333 
1340 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
1341 {
1342  return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
1343 }
1344 
1356 __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
1357 {
1358  MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
1359  ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
1360 }
1361 
1369 __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
1370 {
1371  MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
1372 }
1373 
1380 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
1381 {
1382  return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
1383 }
1384 
1392 __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
1393 {
1394  MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
1395 }
1396 
1403 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
1404 {
1405  return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
1406 }
1407 
1415 __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
1416 {
1417  MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
1418 }
1419 
1426 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
1427 {
1428  return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
1429 }
1430 
1438 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
1439 {
1440  LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
1441 }
1442 
1449 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
1450 {
1451  return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
1452 }
1453 
1461 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
1462 {
1463  MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
1464 }
1465 
1472 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
1473 {
1474  return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
1475 }
1476 
1486 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
1487 {
1488  MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
1489 }
1490 
1499 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
1500 {
1501  return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
1502 }
1503 
1523 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
1524 {
1525  return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
1526 }
1527 
1534 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
1535 {
1536  return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
1537 }
1538 
1545 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
1546 {
1547  return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
1548 }
1549 
1556 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
1557 {
1558  return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
1559 }
1560 
1567 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
1568 {
1569  return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
1570 }
1571 
1578 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
1579 {
1580  return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
1581 }
1582 
1589 __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
1590 {
1591  WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
1592 }
1593 
1600 __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
1601 {
1602  WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
1603 }
1604 
1611 __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
1612 {
1613  WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
1614 }
1615 
1622 __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
1623 {
1624  WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
1625 }
1626 
1633 __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
1634 {
1635  WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
1636 }
1637 
1644 __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
1645 {
1646  WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
1647 }
1648 
1663 __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
1664 {
1665  SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
1666 }
1667 
1674 __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
1675 {
1676  SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
1677 }
1678 
1685 __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
1686 {
1687  SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
1688 }
1689 
1696 __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
1697 {
1698  SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
1699 }
1700 
1707 __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
1708 {
1709  SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
1710 }
1711 
1718 __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
1719 {
1720  SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
1721 }
1722 
1729 __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
1730 {
1731  CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
1732 }
1733 
1740 __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
1741 {
1742  CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
1743 }
1744 
1751 __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
1752 {
1753  CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
1754 }
1755 
1762 __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
1763 {
1764  CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
1765 }
1766 
1773 __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
1774 {
1775  CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
1776 }
1777 
1784 __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
1785 {
1786  CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
1787 }
1788 
1795 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
1796 {
1797  return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
1798 }
1799 
1806 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
1807 {
1808  return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
1809 }
1810 
1817 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
1818 {
1819  return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
1820 }
1821 
1828 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
1829 {
1830  return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
1831 }
1832 
1839 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
1840 {
1841  return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
1842 }
1843 
1850 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
1851 {
1852  return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
1853 }
1854 
1855 
1856 
1861 #if defined(USE_FULL_LL_DRIVER)
1866 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
1867 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
1868 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
1869 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
1871 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
1872 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1873 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1874 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1875 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1876 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
1877 
1881 #endif /* USE_FULL_LL_DRIVER */
1882 
1891 #endif /* defined (DMA2D) */
1892 
1897 #ifdef __cplusplus
1898 }
1899 #endif
1900 
1901 #endif /* STM32F4xx_LL_DMA2D_H */
__STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
Set DMA2D background color values, expressed on 24 bits ([23:0] bits). @rmtoll BGCOLR RED LL_DMA2D_BG...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background red color value, expressed on 8 bits ([7:0] bits). @rmtoll BGCOLR RED LL_DMA2...
__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
Set DMA2D background CLUT color mode. @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode.
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background green color value, expressed on 8 bits ([7:0] bits). @rmtoll BGCOLR GREEN LL_...
__STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
Set DMA2D background line offset, expressed on 14 bits ([13:0] bits). @rmtoll BGOR LO LL_DMA2D_BGND_S...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits). @rmtoll BGPFCCR ALPHA LL_DMA2D...
__STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
Set DMA2D background memory address, expressed on 32 bits ([31:0] bits). @rmtoll BGMAR MA LL_DMA2D_BG...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background color mode. @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode.
__STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
Enable DMA2D background CLUT loading. @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad.
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). @rmtoll BGCMAR MA LL_DM...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background line offset, expressed on 14 bits ([13:0] bits). @rmtoll BGOR LO LL_DMA2D_BGN...
__STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
Set DMA2D background red color value, expressed on 8 bits ([7:0] bits). @rmtoll BGCOLR RED LL_DMA2D_B...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). @rmtoll BGPFCCR CS LL_DMA2D_BGND_Ge...
__STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits). @rmtoll BGCOLR BLUE LL_DMA2D...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D background CLUT loading is enabled. @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCL...
__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). @rmtoll BGPFCCR CS LL_DMA2D_BGND_Se...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background alpha mode. @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode.
__STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits). @rmtoll BGPFCCR ALPHA LL_DMA2D_BG...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits). @rmtoll BGCOLR BLUE LL_DM...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D background memory address, expressed on 32 bits ([31:0] bits). @rmtoll BGMAR MA LL_DMA2D_BG...
__STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
Set DMA2D background alpha mode. @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode.
__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). @rmtoll BGCMAR MA LL_DM...
__STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
Set DMA2D background green color value, expressed on 8 bits ([7:0] bits). @rmtoll BGCOLR GREEN LL_DMA...
__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D background CLUT color mode. @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode.
__STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Set DMA2D background color mode. @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode.
__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
Return DMA2D line offset, expressed on 14 bits ([13:0] bits). @rmtoll OOR LO LL_DMA2D_GetLineOffset.
__STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
Return DMA2D dead time, expressed on 8 bits ([7:0] bits). @rmtoll AMTCR DT LL_DMA2D_GetDeadTime.
__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D output color mode. @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode.
__STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
Set DMA2D line watermark, expressed on 16 bits ([15:0] bits). @rmtoll LWR LW LL_DMA2D_SetLineWatermar...
__STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
Start a DMA2D transfer. @rmtoll CR START LL_DMA2D_Start.
__STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
Enable DMA2D dead time functionality. @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime.
__STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
Suspend DMA2D transfer.
__STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
Set DMA2D output color, expressed on 32 bits ([31:0] bits).
__STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
Set DMA2D line offset, expressed on 14 bits ([13:0] bits). @rmtoll OOR LO LL_DMA2D_SetLineOffset.
__STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
Set DMA2D number of lines, expressed on 16 bits ([15:0] bits). @rmtoll NLR NL LL_DMA2D_SetNbrOfLines.
__STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D mode @rmtoll CR MODE LL_DMA2D_GetMode.
__STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits). @rmtoll NLR PL LL_DMA2D_Set...
__STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D transfer is aborted.
__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
Get DMA2D output color, expressed on 32 bits ([31:0] bits).
__STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
Return DMA2D line watermark, expressed on 16 bits ([15:0] bits). @rmtoll LWR LW LL_DMA2D_GetLineWater...
__STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Set DMA2D output color mode. @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode.
__STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
Set DMA2D dead time, expressed on 8 bits ([7:0] bits). @rmtoll AMTCR DT LL_DMA2D_SetDeadTime.
__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits) @rmtoll NLR PL LL_DMA2D_G...
__STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
Indicate if a DMA2D transfer is ongoing. @rmtoll CR START LL_DMA2D_IsTransferOngoing.
__STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
Disable DMA2D dead time functionality. @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime.
__STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D output memory address, expressed on 32 bits ([31:0] bits). @rmtoll OMAR MA LL_DMA2D_GetOutp...
__STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D transfer is suspended.
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D dead time functionality is enabled. @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime.
__STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
Resume DMA2D transfer.
__STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
Abort DMA2D transfer.
__STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
Set DMA2D output memory address, expressed on 32 bits ([31:0] bits). @rmtoll OMAR MA LL_DMA2D_SetOutp...
__STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
Set DMA2D mode. @rmtoll CR MODE LL_DMA2D_SetMode.
__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
Return DMA2D number of lines, expressed on 16 bits ([15:0] bits). @rmtoll NLR NL LL_DMA2D_GetNbrOfLin...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). @rmtoll FGPFCCR ALPHA LL_DMA2D...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). @rmtoll FGCMAR MA LL_DM...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground color mode. @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode.
__STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). @rmtoll FGCOLR GREEN LL_DMA...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground alpha mode. @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). @rmtoll FGMAR MA LL_DMA2D_FG...
__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). @rmtoll FGCMAR MA LL_DM...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). @rmtoll FGCOLR RED LL_DMA2...
__STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits). @rmtoll FGCOLR RED LL_DMA2D_FG...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
Indicate if DMA2D foreground CLUT loading is enabled. @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCL...
__STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). @rmtoll FGOR LO LL_DMA2D_FGND_S...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). @rmtoll FGCOLR GREEN LL_...
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground CLUT color mode. @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). @rmtoll FGCOLR BLUE LL_DM...
__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). @rmtoll FGPFCCR CS LL_DMA2D_FGND_Se...
__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
Set DMA2D foreground CLUT color mode. @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). @rmtoll FGPFCCR CS LL_DMA2D_FGND_Ge...
__STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). @rmtoll FGCOLR BLUE LL_DMA2D...
__STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Set DMA2D foreground color mode. @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode.
__STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
Enable DMA2D foreground CLUT loading. @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad.
__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). @rmtoll FGOR LO LL_DMA2D_FGN...
__STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). @rmtoll FGCOLR RED LL_DMA2D_F...
__STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
Set DMA2D foreground alpha mode. @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode.
__STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). @rmtoll FGMAR MA LL_DMA2D_FG...
__STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). @rmtoll FGPFCCR ALPHA LL_DMA2D_FG...
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Watermark Interrupt Flag is set or not @rmtoll ISR TWIF LL_DMA2D_IsActive...
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not @rmtoll ISR CTCIF LL_DMA2D_IsA...
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D CLUT Access Error Interrupt Flag is set or not @rmtoll ISR CAEIF LL_DMA2D_IsActive...
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Error Interrupt Flag is set or not @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag...
__STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D Configuration Error Interrupt Flag @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE.
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Complete Interrupt Flag is set or not @rmtoll ISR TCIF LL_DMA2D_IsActiveF...
__STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D Transfer Error Interrupt Flag @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE.
__STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D Transfer Watermark Interrupt Flag @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW.
__STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D Transfer Complete Interrupt Flag @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC.
__STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D CLUT Transfer Complete Interrupt Flag @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC.
__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Configuration Error Interrupt Flag is set or not @rmtoll ISR CEIF LL_DMA2D_IsActiv...
__STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
Clear DMA2D CLUT Access Error Interrupt Flag @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE.
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Configuration Error interrupt source is enabled or disabled. @rmtoll CR CEIE LL_DM...
__STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
Enable Transfer Error Interrupt @rmtoll CR TEIE LL_DMA2D_EnableIT_TE.
__STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
Disable Transfer Error Interrupt @rmtoll CR TEIE LL_DMA2D_DisableIT_TE.
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled. @rmtoll CR TWIE LL_DMA...
__STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
Disable CLUT Transfer Complete Interrupt @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC.
__STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
Enable Transfer Watermark Interrupt @rmtoll CR TWIE LL_DMA2D_EnableIT_TW.
__STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
Disable Transfer Complete Interrupt @rmtoll CR TCIE LL_DMA2D_DisableIT_TC.
__STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
Enable CLUT Access Error Interrupt @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE.
__STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
Disable CLUT Access Error Interrupt @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE.
__STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
Enable CLUT Transfer Complete Interrupt @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC.
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled....
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Complete interrupt source is enabled or disabled. @rmtoll CR TCIE LL_DMA2...
__STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
Disable Transfer Watermark Interrupt @rmtoll CR TWIE LL_DMA2D_DisableIT_TW.
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled. @rmtoll CR CAEIE LL_DMA...
__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
Check if the DMA2D Transfer Error interrupt source is enabled or disabled. @rmtoll CR TEIE LL_DMA2D_I...
__STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
Enable Configuration Error Interrupt @rmtoll CR CEIE LL_DMA2D_EnableIT_CE.
__STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
Disable Configuration Error Interrupt @rmtoll CR CEIE LL_DMA2D_DisableIT_CE.
__STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
Enable Transfer Complete Interrupt @rmtoll CR TCIE LL_DMA2D_EnableIT_TC.
void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx)
Configure the foreground or background according to the specified parameters in the LL_DMA2D_LayerCfg...
void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct)
Initialize DMA2D output color register according to the specified parameters in DMA2D_ColorStruct.
void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg)
Set each LL_DMA2D_LayerCfgTypeDef field to default value.
uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Return DMA2D output Red color.
ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct)
Initialize DMA2D registers according to the specified parameters in DMA2D_InitStruct.
void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct)
Set each LL_DMA2D_InitTypeDef field to default value.
ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx)
De-initialize DMA2D registers (registers restored to their default values).
uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Return DMA2D output Blue color.
uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Return DMA2D output Alpha color.
void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines)
Configure DMA2D transfer size.
uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
Return DMA2D output Green color.
LL DMA2D Output Color Structure Definition.
LL DMA2D Init Structure Definition.
LL DMA2D Layer Configuration Structure Definition.