20 #ifndef STM32F4xx_HAL_TIM_EX_H
21 #define STM32F4xx_HAL_TIM_EX_H
76 #define TIM_TIM2_TIM8_TRGO 0x00000000U
78 #define TIM_TIM2_ETH_PTP TIM_OR_ITR1_RMP_0
79 #define TIM_TIM2_USBFS_SOF TIM_OR_ITR1_RMP_1
80 #define TIM_TIM2_USBHS_SOF (TIM_OR_ITR1_RMP_1 | TIM_OR_ITR1_RMP_0)
83 #define TIM_TIM5_GPIO 0x00000000U
84 #define TIM_TIM5_LSI TIM_OR_TI4_RMP_0
85 #define TIM_TIM5_LSE TIM_OR_TI4_RMP_1
86 #define TIM_TIM5_RTC (TIM_OR_TI4_RMP_1 | TIM_OR_TI4_RMP_0)
88 #define TIM_TIM11_GPIO 0x00000000U
89 #define TIM_TIM11_HSE TIM_OR_TI1_RMP_1
91 #define TIM_TIM11_SPDIFRX TIM_OR_TI1_RMP_0
94 #if defined(LPTIM_OR_TIM1_ITR2_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP)
95 #define LPTIM_REMAP_MASK 0x10000000U
97 #define TIM_TIM9_TIM3_TRGO LPTIM_REMAP_MASK
98 #define TIM_TIM9_LPTIM (LPTIM_REMAP_MASK | LPTIM_OR_TIM9_ITR1_RMP)
100 #define TIM_TIM5_TIM3_TRGO LPTIM_REMAP_MASK
101 #define TIM_TIM5_LPTIM (LPTIM_REMAP_MASK | LPTIM_OR_TIM5_ITR1_RMP)
103 #define TIM_TIM1_TIM3_TRGO LPTIM_REMAP_MASK
104 #define TIM_TIM1_LPTIM (LPTIM_REMAP_MASK | LPTIM_OR_TIM1_ITR2_RMP)
130 #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
131 ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO) || \
132 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \
133 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \
134 (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
135 ((TIM_REMAP) == TIM_TIM5_LSI) || \
136 ((TIM_REMAP) == TIM_TIM5_LSE) || \
137 ((TIM_REMAP) == TIM_TIM5_RTC))) || \
138 (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
139 ((TIM_REMAP) == TIM_TIM11_SPDIFRX) || \
140 ((TIM_REMAP) == TIM_TIM11_HSE))))
142 #if defined(LPTIM_OR_TIM1_ITR2_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP) && defined(LPTIM_OR_TIM5_ITR1_RMP)
143 #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
144 ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO) || \
145 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \
146 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \
147 (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
148 ((TIM_REMAP) == TIM_TIM5_LSI) || \
149 ((TIM_REMAP) == TIM_TIM5_LSE) || \
150 ((TIM_REMAP) == TIM_TIM5_RTC))) || \
151 (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
152 ((TIM_REMAP) == TIM_TIM11_HSE))) || \
153 (((INSTANCE) == TIM1) && (((TIM_REMAP) == TIM_TIM1_TIM3_TRGO) || \
154 ((TIM_REMAP) == TIM_TIM1_LPTIM))) || \
155 (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_TIM3_TRGO) || \
156 ((TIM_REMAP) == TIM_TIM5_LPTIM))) || \
157 (((INSTANCE) == TIM9) && (((TIM_REMAP) == TIM_TIM9_TIM3_TRGO) || \
158 ((TIM_REMAP) == TIM_TIM9_LPTIM))))
160 #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
161 ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO) || \
162 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \
163 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \
164 (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
165 ((TIM_REMAP) == TIM_TIM5_LSI) || \
166 ((TIM_REMAP) == TIM_TIM5_LSE) || \
167 ((TIM_REMAP) == TIM_TIM5_RTC))) || \
168 (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
169 ((TIM_REMAP) == TIM_TIM11_HSE))))
171 #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
172 ((((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_ETH_PTP) || \
173 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF) || \
174 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF))) || \
175 (((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
176 ((TIM_REMAP) == TIM_TIM5_LSI) || \
177 ((TIM_REMAP) == TIM_TIM5_LSE) || \
178 ((TIM_REMAP) == TIM_TIM5_RTC))) || \
179 (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
180 ((TIM_REMAP) == TIM_TIM11_HSE))))
183 #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \
184 ((((INSTANCE) == TIM5) && (((TIM_REMAP) == TIM_TIM5_GPIO) || \
185 ((TIM_REMAP) == TIM_TIM5_LSI) || \
186 ((TIM_REMAP) == TIM_TIM5_LSE) || \
187 ((TIM_REMAP) == TIM_TIM5_RTC))) || \
188 (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || \
189 ((TIM_REMAP) == TIM_TIM11_HSE))))
289 uint32_t CommutationSource);
291 uint32_t CommutationSource);
293 uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
Starts the TIM Hall Sensor Interface in DMA mode.
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
DeInitializes the TIM Hall Sensor interface.
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig)
Initializes the TIM Hall Sensor Interface and initialize the associated handle.
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
Stops the TIM Hall sensor Interface.
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
Starts the TIM Hall Sensor Interface.
void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
Initializes the TIM Hall Sensor MSP.
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
Stops the TIM Hall Sensor Interface in DMA mode.
void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
DeInitializes TIM Hall Sensor MSP.
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
Stops the TIM Hall Sensor Interface in interrupt mode.
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
Starts the TIM Hall Sensor Interface in interrupt mode.
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
Stops the TIM Output Compare signal generation in DMA mode on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
Starts the TIM Output Compare signal generation in interrupt mode on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, uint16_t Length)
Starts the TIM Output Compare signal generation in DMA mode on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
Starts the TIM Output Compare signal generation on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
Stops the TIM Output Compare signal generation on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
Stops the TIM Output Compare signal generation in interrupt mode on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
Stops the PWM signal generation on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
Stops the TIM PWM signal generation in DMA mode on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
Stops the PWM signal generation in interrupt mode on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, uint16_t Length)
Starts the TIM PWM signal generation in DMA mode on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
Starts the PWM signal generation on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
Starts the PWM signal generation in interrupt mode on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
Starts the TIM One Pulse signal generation in interrupt mode on the complementary channel.
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
Starts the TIM One Pulse signal generation on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
Stops the TIM One Pulse signal generation in interrupt mode on the complementary channel.
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
Stops the TIM One Pulse signal generation on the complementary output.
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
Configures the Break feature, dead time, Lock level, OSSI/OSSR State and the AOE(automatic output ena...
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
Configures the TIMx Remapping input capabilities.
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
Configure the TIM commutation event sequence with DMA.
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig)
Configures the TIM in master mode.
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
Configure the TIM commutation event sequence.
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
Configure the TIM commutation event sequence with interrupt.
void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
Break detection callback in non-blocking mode.
void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
Commutation callback in non-blocking mode.
void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
Commutation half complete callback in non-blocking mode.
HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
Return actual state of the TIM complementary channel.
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim)
Return the TIM Hall Sensor interface handle state.
uint32_t Commutation_Delay
TIM Hall sensor Configuration Structure definition.
void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
TIM DMA Commutation half complete callback.
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
TIM DMA Commutation callback.
HAL_TIM_ChannelStateTypeDef
TIM Channel States definition.
HAL_TIM_StateTypeDef
HAL State structures definition.
struct __TIM_HandleTypeDef else typedef struct endif TIM_HandleTypeDef
TIM Time Base Handle Structure definition.
TIM Break input(s) and Dead time configuration Structure definition.
TIM Master configuration Structure definition.
This file contains HAL common defines, enumeration, macros and structures definitions.
DMA handle Structure definition.