STM32F4xx_HAL_Driver  1.8.3
stm32f4xx_hal_spdifrx.c
Go to the documentation of this file.
1 
161 /* Includes ------------------------------------------------------------------*/
162 #include "stm32f4xx_hal.h"
163 
173 #ifdef HAL_SPDIFRX_MODULE_ENABLED
174 #if defined (SPDIFRX)
175 #if defined(STM32F446xx)
176 /* Private typedef -----------------------------------------------------------*/
177 /* Private define ------------------------------------------------------------*/
181 #define SPDIFRX_TIMEOUT_VALUE 10U
185 /* Private macro -------------------------------------------------------------*/
186 /* Private variables ---------------------------------------------------------*/
187 /* Private function prototypes -----------------------------------------------*/
191 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
192 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
193 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
194 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
195 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
196 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
197 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
198 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag,
199  FlagStatus Status, uint32_t Timeout, uint32_t tickstart);
203 /* Exported functions ---------------------------------------------------------*/
204 
244 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
245 {
246  uint32_t tmpreg;
247 
248  /* Check the SPDIFRX handle allocation */
249  if (hspdif == NULL)
250  {
251  return HAL_ERROR;
252  }
253 
254  /* Check the SPDIFRX parameters */
255  assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
256  assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
257  assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
258  assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
259  assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
260  assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
261  assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
262  assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
263  assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
264  assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
265 
266 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
267  if (hspdif->State == HAL_SPDIFRX_STATE_RESET)
268  {
269  /* Allocate lock resource and initialize it */
270  hspdif->Lock = HAL_UNLOCKED;
271 
272  hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
273  hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback; /* Legacy weak RxCpltCallback */
274  hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback; /* Legacy weak CxHalfCpltCallback */
275  hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback; /* Legacy weak CxCpltCallback */
276  hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback; /* Legacy weak ErrorCallback */
277 
278  if (hspdif->MspInitCallback == NULL)
279  {
280  hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit */
281  }
282 
283  /* Init the low level hardware */
284  hspdif->MspInitCallback(hspdif);
285  }
286 #else
287  if (hspdif->State == HAL_SPDIFRX_STATE_RESET)
288  {
289  /* Allocate lock resource and initialize it */
290  hspdif->Lock = HAL_UNLOCKED;
291  /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
292  HAL_SPDIFRX_MspInit(hspdif);
293  }
294 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
295 
296  /* SPDIFRX peripheral state is BUSY */
297  hspdif->State = HAL_SPDIFRX_STATE_BUSY;
298 
299  /* Disable SPDIFRX interface (IDLE State) */
300  __HAL_SPDIFRX_IDLE(hspdif);
301 
302  /* Reset the old SPDIFRX CR configuration */
303  tmpreg = hspdif->Instance->CR;
304 
305  tmpreg &= ~(SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
306  SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
307  SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
308  SPDIFRX_CR_INSEL);
309 
310  /* Sets the new configuration of the SPDIFRX peripheral */
311  tmpreg |= (hspdif->Init.StereoMode |
312  hspdif->Init.InputSelection |
313  hspdif->Init.Retries |
314  hspdif->Init.WaitForActivity |
315  hspdif->Init.ChannelSelection |
316  hspdif->Init.DataFormat |
317  hspdif->Init.PreambleTypeMask |
318  hspdif->Init.ChannelStatusMask |
319  hspdif->Init.ValidityBitMask |
320  hspdif->Init.ParityErrorMask
321  );
322 
323 
324  hspdif->Instance->CR = tmpreg;
325 
326  hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
327 
328  /* SPDIFRX peripheral state is READY*/
329  hspdif->State = HAL_SPDIFRX_STATE_READY;
330 
331  return HAL_OK;
332 }
333 
339 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
340 {
341  /* Check the SPDIFRX handle allocation */
342  if (hspdif == NULL)
343  {
344  return HAL_ERROR;
345  }
346 
347  /* Check the parameters */
348  assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
349 
350  hspdif->State = HAL_SPDIFRX_STATE_BUSY;
351 
352  /* Disable SPDIFRX interface (IDLE state) */
353  __HAL_SPDIFRX_IDLE(hspdif);
354 
355 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
356  if (hspdif->MspDeInitCallback == NULL)
357  {
358  hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspDeInit */
359  }
360 
361  /* DeInit the low level hardware */
362  hspdif->MspDeInitCallback(hspdif);
363 #else
364  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
365  HAL_SPDIFRX_MspDeInit(hspdif);
366 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
367 
368  hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
369 
370  /* SPDIFRX peripheral state is RESET*/
371  hspdif->State = HAL_SPDIFRX_STATE_RESET;
372 
373  /* Release Lock */
374  __HAL_UNLOCK(hspdif);
375 
376  return HAL_OK;
377 }
378 
385 {
386  /* Prevent unused argument(s) compilation warning */
387  UNUSED(hspdif);
388 
389  /* NOTE : This function Should not be modified, when the callback is needed,
390  the HAL_SPDIFRX_MspInit could be implemented in the user file
391  */
392 }
393 
400 {
401  /* Prevent unused argument(s) compilation warning */
402  UNUSED(hspdif);
403 
404  /* NOTE : This function Should not be modified, when the callback is needed,
405  the HAL_SPDIFRX_MspDeInit could be implemented in the user file
406  */
407 }
408 
409 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
427  pSPDIFRX_CallbackTypeDef pCallback)
428 {
429  HAL_StatusTypeDef status = HAL_OK;
430 
431  if (pCallback == NULL)
432  {
433  /* Update the error code */
434  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
435  return HAL_ERROR;
436  }
437  /* Process locked */
438  __HAL_LOCK(hspdif);
439 
440  if (HAL_SPDIFRX_STATE_READY == hspdif->State)
441  {
442  switch (CallbackID)
443  {
445  hspdif->RxHalfCpltCallback = pCallback;
446  break;
447 
449  hspdif->RxCpltCallback = pCallback;
450  break;
451 
453  hspdif->CxHalfCpltCallback = pCallback;
454  break;
455 
457  hspdif->CxCpltCallback = pCallback;
458  break;
459 
461  hspdif->ErrorCallback = pCallback;
462  break;
463 
465  hspdif->MspInitCallback = pCallback;
466  break;
467 
469  hspdif->MspDeInitCallback = pCallback;
470  break;
471 
472  default :
473  /* Update the error code */
474  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
475  /* Return error status */
476  status = HAL_ERROR;
477  break;
478  }
479  }
480  else if (HAL_SPDIFRX_STATE_RESET == hspdif->State)
481  {
482  switch (CallbackID)
483  {
485  hspdif->MspInitCallback = pCallback;
486  break;
487 
489  hspdif->MspDeInitCallback = pCallback;
490  break;
491 
492  default :
493  /* Update the error code */
494  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
495  /* Return error status */
496  status = HAL_ERROR;
497  break;
498  }
499  }
500  else
501  {
502  /* Update the error code */
503  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
504  /* Return error status */
505  status = HAL_ERROR;
506  }
507 
508  /* Release Lock */
509  __HAL_UNLOCK(hspdif);
510  return status;
511 }
512 
530 {
531  HAL_StatusTypeDef status = HAL_OK;
532 
533  /* Process locked */
534  __HAL_LOCK(hspdif);
535 
536  if (HAL_SPDIFRX_STATE_READY == hspdif->State)
537  {
538  switch (CallbackID)
539  {
541  hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback;
542  break;
543 
545  hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback;
546  break;
547 
549  hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback;
550  break;
551 
553  hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback;
554  break;
555 
557  hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback;
558  break;
559 
560  default :
561  /* Update the error code */
562  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
563  /* Return error status */
564  status = HAL_ERROR;
565  break;
566  }
567  }
568  else if (HAL_SPDIFRX_STATE_RESET == hspdif->State)
569  {
570  switch (CallbackID)
571  {
573  hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit */
574  break;
575 
577  hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspInit */
578  break;
579 
580  default :
581  /* Update the error code */
582  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
583  /* Return error status */
584  status = HAL_ERROR;
585  break;
586  }
587  }
588  else
589  {
590  /* Update the error code */
591  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
592  /* Return error status */
593  status = HAL_ERROR;
594  }
595 
596  /* Release Lock */
597  __HAL_UNLOCK(hspdif);
598  return status;
599 }
600 
601 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
602 
610 {
611  uint32_t tmpreg;
612 
613  /* Check the SPDIFRX handle allocation */
614  if (hspdif == NULL)
615  {
616  return HAL_ERROR;
617  }
618 
619  /* Check the SPDIFRX parameters */
620  assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
621  assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
622  assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
623  assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
624  assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
625  assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
626 
627  /* Reset the old SPDIFRX CR configuration */
628  tmpreg = hspdif->Instance->CR;
629 
630  if (((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
631  (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
632  ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
633  {
634  return HAL_ERROR;
635  }
636 
637  tmpreg &= ~(SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
638  SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
639 
640  /* Configure the new data format */
641  tmpreg |= (sDataFormat.StereoMode |
642  sDataFormat.DataFormat |
643  sDataFormat.PreambleTypeMask |
644  sDataFormat.ChannelStatusMask |
645  sDataFormat.ValidityBitMask |
646  sDataFormat.ParityErrorMask);
647 
648  hspdif->Instance->CR = tmpreg;
649 
650  return HAL_OK;
651 }
652 
708 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
709  uint32_t Timeout)
710 {
711  uint32_t tickstart;
712  uint16_t sizeCounter = Size;
713  uint32_t *pTmpBuf = pData;
714 
715  if ((pData == NULL) || (Size == 0U))
716  {
717  return HAL_ERROR;
718  }
719 
720  if (hspdif->State == HAL_SPDIFRX_STATE_READY)
721  {
722  /* Process Locked */
723  __HAL_LOCK(hspdif);
724 
725  hspdif->State = HAL_SPDIFRX_STATE_BUSY;
726 
727  /* Start synchronisation */
728  __HAL_SPDIFRX_SYNC(hspdif);
729 
730  /* Get tick */
731  tickstart = HAL_GetTick();
732 
733  /* Wait until SYNCD flag is set */
734  if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
735  {
736  return HAL_TIMEOUT;
737  }
738 
739  /* Start reception */
740  __HAL_SPDIFRX_RCV(hspdif);
741 
742  /* Receive data flow */
743  while (sizeCounter > 0U)
744  {
745  /* Get tick */
746  tickstart = HAL_GetTick();
747 
748  /* Wait until RXNE flag is set */
749  if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
750  {
751  return HAL_TIMEOUT;
752  }
753 
754  (*pTmpBuf) = hspdif->Instance->DR;
755  pTmpBuf++;
756  sizeCounter--;
757  }
758 
759  /* SPDIFRX ready */
760  hspdif->State = HAL_SPDIFRX_STATE_READY;
761 
762  /* Process Unlocked */
763  __HAL_UNLOCK(hspdif);
764 
765  return HAL_OK;
766  }
767  else
768  {
769  return HAL_BUSY;
770  }
771 }
772 
782 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
783  uint32_t Timeout)
784 {
785  uint32_t tickstart;
786  uint16_t sizeCounter = Size;
787  uint32_t *pTmpBuf = pData;
788 
789  if ((pData == NULL) || (Size == 0U))
790  {
791  return HAL_ERROR;
792  }
793 
794  if (hspdif->State == HAL_SPDIFRX_STATE_READY)
795  {
796  /* Process Locked */
797  __HAL_LOCK(hspdif);
798 
799  hspdif->State = HAL_SPDIFRX_STATE_BUSY;
800 
801  /* Start synchronization */
802  __HAL_SPDIFRX_SYNC(hspdif);
803 
804  /* Get tick */
805  tickstart = HAL_GetTick();
806 
807  /* Wait until SYNCD flag is set */
808  if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
809  {
810  return HAL_TIMEOUT;
811  }
812 
813  /* Start reception */
814  __HAL_SPDIFRX_RCV(hspdif);
815 
816  /* Receive control flow */
817  while (sizeCounter > 0U)
818  {
819  /* Get tick */
820  tickstart = HAL_GetTick();
821 
822  /* Wait until CSRNE flag is set */
823  if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout, tickstart) != HAL_OK)
824  {
825  return HAL_TIMEOUT;
826  }
827 
828  (*pTmpBuf) = hspdif->Instance->CSR;
829  pTmpBuf++;
830  sizeCounter--;
831  }
832 
833  /* SPDIFRX ready */
834  hspdif->State = HAL_SPDIFRX_STATE_READY;
835 
836  /* Process Unlocked */
837  __HAL_UNLOCK(hspdif);
838 
839  return HAL_OK;
840  }
841  else
842  {
843  return HAL_BUSY;
844  }
845 }
846 
854 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
855 {
856  uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
857 
858  const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
859 
860  if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
861  {
862  if ((pData == NULL) || (Size == 0U))
863  {
864  return HAL_ERROR;
865  }
866 
867  /* Process Locked */
868  __HAL_LOCK(hspdif);
869 
870  hspdif->pRxBuffPtr = pData;
871  hspdif->RxXferSize = Size;
872  hspdif->RxXferCount = Size;
873 
874  hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
875 
876  /* Check if a receive process is ongoing or not */
877  hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
878 
879  /* Enable the SPDIFRX PE Error Interrupt */
880  __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
881 
882  /* Enable the SPDIFRX OVR Error Interrupt */
883  __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
884 
885  /* Enable the SPDIFRX RXNE interrupt */
886  __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
887 
888  if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
889  {
890  /* Start synchronization */
891  __HAL_SPDIFRX_SYNC(hspdif);
892 
893  /* Wait until SYNCD flag is set */
894  do
895  {
896  if (count == 0U)
897  {
898  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
899  process */
900  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
901  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
902  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
903  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
904  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
905  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
906  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
907 
908  hspdif->State = HAL_SPDIFRX_STATE_READY;
909 
910  /* Process Unlocked */
911  __HAL_UNLOCK(hspdif);
912 
913  return HAL_TIMEOUT;
914  }
915  count--;
916  } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
917 
918  /* Start reception */
919  __HAL_SPDIFRX_RCV(hspdif);
920  }
921 
922  /* Process Unlocked */
923  __HAL_UNLOCK(hspdif);
924 
925  return HAL_OK;
926  }
927  else
928  {
929  return HAL_BUSY;
930  }
931 }
932 
940 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
941 {
942  uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
943 
944  const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
945 
946  if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
947  {
948  if ((pData == NULL) || (Size == 0U))
949  {
950  return HAL_ERROR;
951  }
952 
953  /* Process Locked */
954  __HAL_LOCK(hspdif);
955 
956  hspdif->pCsBuffPtr = pData;
957  hspdif->CsXferSize = Size;
958  hspdif->CsXferCount = Size;
959 
960  hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
961 
962  /* Check if a receive process is ongoing or not */
963  hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
964 
965  /* Enable the SPDIFRX PE Error Interrupt */
966  __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
967 
968  /* Enable the SPDIFRX OVR Error Interrupt */
969  __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
970 
971  /* Enable the SPDIFRX CSRNE interrupt */
972  __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
973 
974  if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
975  {
976  /* Start synchronization */
977  __HAL_SPDIFRX_SYNC(hspdif);
978 
979  /* Wait until SYNCD flag is set */
980  do
981  {
982  if (count == 0U)
983  {
984  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
985  process */
986  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
987  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
988  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
989  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
990  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
991  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
992  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
993 
994  hspdif->State = HAL_SPDIFRX_STATE_READY;
995 
996  /* Process Unlocked */
997  __HAL_UNLOCK(hspdif);
998 
999  return HAL_TIMEOUT;
1000  }
1001  count--;
1002  } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1003 
1004  /* Start reception */
1005  __HAL_SPDIFRX_RCV(hspdif);
1006  }
1007 
1008  /* Process Unlocked */
1009  __HAL_UNLOCK(hspdif);
1010 
1011  return HAL_OK;
1012  }
1013  else
1014  {
1015  return HAL_BUSY;
1016  }
1017 }
1018 
1026 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
1027 {
1028  uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
1029 
1030  const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
1031 
1032  if ((pData == NULL) || (Size == 0U))
1033  {
1034  return HAL_ERROR;
1035  }
1036 
1037  if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
1038  {
1039  /* Process Locked */
1040  __HAL_LOCK(hspdif);
1041 
1042  hspdif->pRxBuffPtr = pData;
1043  hspdif->RxXferSize = Size;
1044  hspdif->RxXferCount = Size;
1045 
1046  hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
1047  hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
1048 
1049  /* Set the SPDIFRX Rx DMA Half transfer complete callback */
1050  hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
1051 
1052  /* Set the SPDIFRX Rx DMA transfer complete callback */
1053  hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
1054 
1055  /* Set the DMA error callback */
1056  hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
1057 
1058  /* Enable the DMA request */
1059  if (HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size) !=
1060  HAL_OK)
1061  {
1062  /* Set SPDIFRX error */
1063  hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
1064 
1065  /* Set SPDIFRX state */
1066  hspdif->State = HAL_SPDIFRX_STATE_ERROR;
1067 
1068  /* Process Unlocked */
1069  __HAL_UNLOCK(hspdif);
1070 
1071  return HAL_ERROR;
1072  }
1073 
1074  /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
1075  hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
1076 
1077  if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
1078  {
1079  /* Start synchronization */
1080  __HAL_SPDIFRX_SYNC(hspdif);
1081 
1082  /* Wait until SYNCD flag is set */
1083  do
1084  {
1085  if (count == 0U)
1086  {
1087  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
1088  process */
1089  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1090  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1091  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1092  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1093  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1094  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1095  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1096 
1097  hspdif->State = HAL_SPDIFRX_STATE_READY;
1098 
1099  /* Process Unlocked */
1100  __HAL_UNLOCK(hspdif);
1101 
1102  return HAL_TIMEOUT;
1103  }
1104  count--;
1105  } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1106 
1107  /* Start reception */
1108  __HAL_SPDIFRX_RCV(hspdif);
1109  }
1110 
1111  /* Process Unlocked */
1112  __HAL_UNLOCK(hspdif);
1113 
1114  return HAL_OK;
1115  }
1116  else
1117  {
1118  return HAL_BUSY;
1119  }
1120 }
1121 
1129 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
1130 {
1131  uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
1132 
1133  const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
1134 
1135  if ((pData == NULL) || (Size == 0U))
1136  {
1137  return HAL_ERROR;
1138  }
1139 
1140  if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
1141  {
1142  hspdif->pCsBuffPtr = pData;
1143  hspdif->CsXferSize = Size;
1144  hspdif->CsXferCount = Size;
1145 
1146  /* Process Locked */
1147  __HAL_LOCK(hspdif);
1148 
1149  hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
1150  hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
1151 
1152  /* Set the SPDIFRX Rx DMA Half transfer complete callback */
1153  hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
1154 
1155  /* Set the SPDIFRX Rx DMA transfer complete callback */
1156  hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
1157 
1158  /* Set the DMA error callback */
1159  hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
1160 
1161  /* Enable the DMA request */
1162  if (HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size) !=
1163  HAL_OK)
1164  {
1165  /* Set SPDIFRX error */
1166  hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
1167 
1168  /* Set SPDIFRX state */
1169  hspdif->State = HAL_SPDIFRX_STATE_ERROR;
1170 
1171  /* Process Unlocked */
1172  __HAL_UNLOCK(hspdif);
1173 
1174  return HAL_ERROR;
1175  }
1176 
1177  /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
1178  hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
1179 
1180  if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
1181  {
1182  /* Start synchronization */
1183  __HAL_SPDIFRX_SYNC(hspdif);
1184 
1185  /* Wait until SYNCD flag is set */
1186  do
1187  {
1188  if (count == 0U)
1189  {
1190  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
1191  process */
1192  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1193  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1194  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1195  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1196  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1197  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1198  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1199 
1200  hspdif->State = HAL_SPDIFRX_STATE_READY;
1201 
1202  /* Process Unlocked */
1203  __HAL_UNLOCK(hspdif);
1204 
1205  return HAL_TIMEOUT;
1206  }
1207  count--;
1208  } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1209 
1210  /* Start reception */
1211  __HAL_SPDIFRX_RCV(hspdif);
1212  }
1213 
1214  /* Process Unlocked */
1215  __HAL_UNLOCK(hspdif);
1216 
1217  return HAL_OK;
1218  }
1219  else
1220  {
1221  return HAL_BUSY;
1222  }
1223 }
1224 
1230 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
1231 {
1232  /* Process Locked */
1233  __HAL_LOCK(hspdif);
1234 
1235  /* Disable the SPDIFRX DMA requests */
1236  hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1237  hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1238 
1239  /* Disable the SPDIFRX DMA channel */
1240  if (hspdif->hdmaDrRx != NULL)
1241  {
1242  __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
1243  }
1244  if (hspdif->hdmaCsRx != NULL)
1245  {
1246  __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
1247  }
1248 
1249  /* Disable SPDIFRX peripheral */
1250  __HAL_SPDIFRX_IDLE(hspdif);
1251 
1252  hspdif->State = HAL_SPDIFRX_STATE_READY;
1253 
1254  /* Process Unlocked */
1255  __HAL_UNLOCK(hspdif);
1256 
1257  return HAL_OK;
1258 }
1259 
1266 {
1267  uint32_t itFlag = hspdif->Instance->SR;
1268  uint32_t itSource = hspdif->Instance->IMR;
1269 
1270  /* SPDIFRX in mode Data Flow Reception */
1271  if (((itFlag & SPDIFRX_FLAG_RXNE) == SPDIFRX_FLAG_RXNE) && ((itSource & SPDIFRX_IT_RXNE) == SPDIFRX_IT_RXNE))
1272  {
1273  __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
1274  SPDIFRX_ReceiveDataFlow_IT(hspdif);
1275  }
1276 
1277  /* SPDIFRX in mode Control Flow Reception */
1278  if (((itFlag & SPDIFRX_FLAG_CSRNE) == SPDIFRX_FLAG_CSRNE) && ((itSource & SPDIFRX_IT_CSRNE) == SPDIFRX_IT_CSRNE))
1279  {
1280  __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
1281  SPDIFRX_ReceiveControlFlow_IT(hspdif);
1282  }
1283 
1284  /* SPDIFRX Overrun error interrupt occurred */
1285  if (((itFlag & SPDIFRX_FLAG_OVR) == SPDIFRX_FLAG_OVR) && ((itSource & SPDIFRX_IT_OVRIE) == SPDIFRX_IT_OVRIE))
1286  {
1287  __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_OVRIE);
1288 
1289  /* Change the SPDIFRX error code */
1290  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
1291 
1292  /* the transfer is not stopped */
1293  HAL_SPDIFRX_ErrorCallback(hspdif);
1294  }
1295 
1296  /* SPDIFRX Parity error interrupt occurred */
1297  if (((itFlag & SPDIFRX_FLAG_PERR) == SPDIFRX_FLAG_PERR) && ((itSource & SPDIFRX_IT_PERRIE) == SPDIFRX_IT_PERRIE))
1298  {
1299  __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_PERRIE);
1300 
1301  /* Change the SPDIFRX error code */
1302  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
1303 
1304  /* the transfer is not stopped */
1305  HAL_SPDIFRX_ErrorCallback(hspdif);
1306  }
1307 }
1308 
1315 {
1316  /* Prevent unused argument(s) compilation warning */
1317  UNUSED(hspdif);
1318 
1319  /* NOTE : This function Should not be modified, when the callback is needed,
1320  the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1321  */
1322 }
1323 
1330 {
1331  /* Prevent unused argument(s) compilation warning */
1332  UNUSED(hspdif);
1333 
1334  /* NOTE : This function Should not be modified, when the callback is needed,
1335  the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1336  */
1337 }
1338 
1345 {
1346  /* Prevent unused argument(s) compilation warning */
1347  UNUSED(hspdif);
1348 
1349  /* NOTE : This function Should not be modified, when the callback is needed,
1350  the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1351  */
1352 }
1353 
1360 {
1361  /* Prevent unused argument(s) compilation warning */
1362  UNUSED(hspdif);
1363 
1364  /* NOTE : This function Should not be modified, when the callback is needed,
1365  the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1366  */
1367 }
1368 
1375 {
1376  /* Prevent unused argument(s) compilation warning */
1377  UNUSED(hspdif);
1378 
1379  /* NOTE : This function Should not be modified, when the callback is needed,
1380  the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
1381  */
1382 }
1383 
1409 {
1410  return hspdif->State;
1411 }
1412 
1418 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif)
1419 {
1420  return hspdif->ErrorCode;
1421 }
1422 
1432 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
1433 {
1434  SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1435 
1436  /* Disable Rx DMA Request */
1437  if (hdma->Init.Mode != DMA_CIRCULAR)
1438  {
1439  hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1440  hspdif->RxXferCount = 0;
1441  hspdif->State = HAL_SPDIFRX_STATE_READY;
1442  }
1443 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1444  hspdif->RxCpltCallback(hspdif);
1445 #else
1447 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1448 }
1449 
1455 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1456 {
1457  SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1458 
1459 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1460  hspdif->RxHalfCpltCallback(hspdif);
1461 #else
1463 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1464 }
1465 
1466 
1472 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
1473 {
1474  SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1475 
1476  /* Disable Cb DMA Request */
1477  hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1478  hspdif->CsXferCount = 0;
1479 
1480  hspdif->State = HAL_SPDIFRX_STATE_READY;
1481 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1482  hspdif->CxCpltCallback(hspdif);
1483 #else
1485 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1486 }
1487 
1493 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
1494 {
1495  SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1496 
1497 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1498  hspdif->CxHalfCpltCallback(hspdif);
1499 #else
1501 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1502 }
1503 
1509 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
1510 {
1511  SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1512 
1513  /* Disable Rx and Cb DMA Request */
1514  hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
1515  hspdif->RxXferCount = 0;
1516 
1517  hspdif->State = HAL_SPDIFRX_STATE_READY;
1518 
1519  /* Set the error code and execute error callback*/
1520  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
1521 
1522 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1523  /* The transfer is not stopped */
1524  hspdif->ErrorCallback(hspdif);
1525 #else
1526  /* The transfer is not stopped */
1527  HAL_SPDIFRX_ErrorCallback(hspdif);
1528 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1529 }
1530 
1536 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1537 {
1538  /* Receive data */
1539  (*hspdif->pRxBuffPtr) = hspdif->Instance->DR;
1540  hspdif->pRxBuffPtr++;
1541  hspdif->RxXferCount--;
1542 
1543  if (hspdif->RxXferCount == 0U)
1544  {
1545  /* Disable RXNE/PE and OVR interrupts */
1546  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
1547 
1548  hspdif->State = HAL_SPDIFRX_STATE_READY;
1549 
1550  /* Process Unlocked */
1551  __HAL_UNLOCK(hspdif);
1552 
1553 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1554  hspdif->RxCpltCallback(hspdif);
1555 #else
1557 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1558  }
1559 }
1560 
1566 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1567 {
1568  /* Receive data */
1569  (*hspdif->pCsBuffPtr) = hspdif->Instance->CSR;
1570  hspdif->pCsBuffPtr++;
1571  hspdif->CsXferCount--;
1572 
1573  if (hspdif->CsXferCount == 0U)
1574  {
1575  /* Disable CSRNE interrupt */
1576  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1577 
1578  hspdif->State = HAL_SPDIFRX_STATE_READY;
1579 
1580  /* Process Unlocked */
1581  __HAL_UNLOCK(hspdif);
1582 
1583 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1584  hspdif->CxCpltCallback(hspdif);
1585 #else
1587 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1588  }
1589 }
1590 
1600 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag,
1601  FlagStatus Status, uint32_t Timeout, uint32_t tickstart)
1602 {
1603  /* Wait until flag is set */
1604  while (__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == Status)
1605  {
1606  /* Check for the Timeout */
1607  if (Timeout != HAL_MAX_DELAY)
1608  {
1609  if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1610  {
1611  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt
1612  process */
1613  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1614  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1615  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1616  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1617  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1618  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1619  __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1620 
1621  hspdif->State = HAL_SPDIFRX_STATE_READY;
1622 
1623  /* Process Unlocked */
1624  __HAL_UNLOCK(hspdif);
1625 
1626  return HAL_TIMEOUT;
1627  }
1628  }
1629  }
1630 
1631  return HAL_OK;
1632 }
1633 
1637 #endif /* STM32F446xx */
1638 
1639 #endif /* SPDIFRX */
1640 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
Start the DMA Transfer with interrupt enabled.
uint32_t HAL_GetTick(void)
Provides a tick value in millisecond.
HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID)
Unregister a SPDIFRX Callback SPDIFRX callback is redirected to the weak predefined callback.
HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, pSPDIFRX_CallbackTypeDef pCallback)
Register a User SPDIFRX Callback To be used instead of the weak predefined callback.
void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
SPDIFRX MSP DeInit.
void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
SPDIFRX MSP Init.
HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
Set the SPDIFRX data format according to the specified parameters in the SPDIFRX_InitTypeDef.
HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
Initializes the SPDIFRX according to the specified parameters in the SPDIFRX_InitTypeDef and create t...
HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
DeInitializes the SPDIFRX peripheral.
void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
Rx Transfer (Data flow) completed callbacks.
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
Receives an amount of data (Data Flow) in blocking mode.
void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
SPDIFRX error callbacks.
HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
stop the audio stream receive from the Media.
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
Receive an amount of data (Control Flow) with DMA.
void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
Rx (Control flow) Transfer half completed callbacks.
void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
Rx Transfer (Data flow) half completed callbacks.
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
Receive an amount of data (Data Flow) in non-blocking mode with Interrupt.
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
Receive an amount of data (Data Flow) mode with DMA.
void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
Rx Transfer (Control flow) completed callbacks.
void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
This function handles SPDIFRX interrupt request.
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
Receive an amount of data (Control Flow) with Interrupt.
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
Receives an amount of data (Control Flow) in blocking mode.
uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif)
Return the SPDIFRX error code.
HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif)
Return the SPDIFRX state.
HAL_SPDIFRX_StateTypeDef
HAL State structures definition.
struct __SPDIFRX_HandleTypeDef else typedef struct endif SPDIFRX_HandleTypeDef
SPDIFRX handle Structure definition.
void(* pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef *hspdif)
HAL SPDIFRX Callback pointer definition.
HAL_SPDIFRX_CallbackIDTypeDef
HAL SPDIFRX Callback ID enumeration definition.
@ HAL_SPDIFRX_STATE_RESET
@ HAL_SPDIFRX_STATE_BUSY_RX
@ HAL_SPDIFRX_STATE_ERROR
@ HAL_SPDIFRX_STATE_READY
@ HAL_SPDIFRX_STATE_BUSY_CX
@ HAL_SPDIFRX_STATE_BUSY
@ HAL_SPDIFRX_RX_HALF_CB_ID
@ HAL_SPDIFRX_RX_CPLT_CB_ID
@ HAL_SPDIFRX_MSPDEINIT_CB_ID
@ HAL_SPDIFRX_MSPINIT_CB_ID
@ HAL_SPDIFRX_CX_CPLT_CB_ID
@ HAL_SPDIFRX_ERROR_CB_ID
@ HAL_SPDIFRX_CX_HALF_CB_ID
SPDIFRX SetDataFormat structure definition.
This file contains all the functions prototypes for the HAL module driver.
DMA handle Structure definition.
DMA_InitTypeDef Init