RCCEx Exported Types

Collaboration diagram for RCCEx Exported Types:

Data Structures
struct	RCC_PLLInitTypeDef
	RCC PLL configuration structure definition. More...
struct	RCC_PLLI2SInitTypeDef
	PLLI2S Clock structure definition. More...
struct	RCC_PLLSAIInitTypeDef
	PLLSAI Clock structure definition. More...
struct	RCC_PeriphCLKInitTypeDef
	RCC extended clocks structure definition. More...

Detailed Description

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Data Structure Documentation

RCC_PLLInitTypeDef

struct RCC_PLLInitTypeDef

RCC PLL configuration structure definition.

Definition at line 45 of file stm32f4xx_hal_rcc_ex.h.

Data Fields
uint32_t	PLLM	PLLM: Division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 0 and Max_Data = 63
uint32_t	PLLN	PLLN: Multiplication factor for PLL VCO output clock. This parameter must be a number between Min_Data = 50 and Max_Data = 432 except for STM32F411xE devices where the Min_Data = 192
uint32_t	PLLP	PLLP: Division factor for main system clock (SYSCLK). This parameter must be a value of PLLP Clock Divider
uint32_t	PLLQ	PLLQ: Division factor for OTG FS, SDIO and RNG clocks. This parameter must be a number between Min_Data = 2 and Max_Data = 15
uint32_t	PLLR	PLLR: PLL division factor for I2S, SAI, SYSTEM, SPDIFRX clocks. This parameter is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx and STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/STM32F413xx/STM32F423xx devices. This parameter must be a number between Min_Data = 2 and Max_Data = 7
uint32_t	PLLSource	RCC_PLLSource: PLL entry clock source. This parameter must be a value of PLL Clock Source
uint32_t	PLLState	The new state of the PLL. This parameter can be a value of PLL Config

RCC_PLLI2SInitTypeDef

struct RCC_PLLI2SInitTypeDef

PLLI2S Clock structure definition.

Definition at line 79 of file stm32f4xx_hal_rcc_ex.h.

Data Fields
uint32_t	PLLI2SM	Specifies division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 2 and Max_Data = 63 PLLM: Division factor for PLLI2S VCO input clock. This parameter must be a number between Min_Data = 2 and Max_Data = 62
uint32_t	PLLI2SN	Specifies the multiplication factor for PLLI2S VCO output clock. This parameter must be a number between Min_Data = 50 and Max_Data = 432 Specifies the multiplication factor for PLLI2S VCO output clock. This parameter must be a number between Min_Data = 50 and Max_Data = 432. This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI Specifies the multiplication factor for PLLI2S VCO output clock. This parameter must be a number between Min_Data = 50 and Max_Data = 432 Except for STM32F411xE devices where the Min_Data = 192. This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI
uint32_t	PLLI2SP	Specifies division factor for SPDIFRX Clock. This parameter must be a value of RCC PLLI2SP Clock Divider
uint32_t	PLLI2SQ	Specifies the division factor for SAI clock. This parameter must be a number between Min_Data = 2 and Max_Data = 15. This parameter will be used only when PLLI2S is selected as Clock Source SAI Specifies the division factor for SAI1 clock. This parameter must be a number between Min_Data = 2 and Max_Data = 15. This parameter will be used only when PLLI2S is selected as Clock Source SAI
uint32_t	PLLI2SR	Specifies the division factor for I2S clock. This parameter must be a number between Min_Data = 2 and Max_Data = 7. This parameter will be used only when PLLI2S is selected as Clock Source I2S Specifies the division factor for I2S clock. This parameter must be a number between Min_Data = 2 and Max_Data = 7. This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI

RCC_PLLSAIInitTypeDef

struct RCC_PLLSAIInitTypeDef

PLLSAI Clock structure definition.

Definition at line 102 of file stm32f4xx_hal_rcc_ex.h.

Data Fields
uint32_t	PLLSAIM	Specifies division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 2 and Max_Data = 63
uint32_t	PLLSAIN	Specifies the multiplication factor for PLLI2S VCO output clock. This parameter must be a number between Min_Data = 50 and Max_Data = 432 Specifies the multiplication factor for PLLI2S VCO output clock. This parameter must be a number between Min_Data = 50 and Max_Data = 432. This parameter will be used only when PLLSAI is selected as Clock Source SAI or LTDC
uint32_t	PLLSAIP	Specifies division factor for OTG FS, SDIO and RNG clocks. This parameter must be a value of RCC PLLSAIP Clock Divider Specifies division factor for OTG FS and SDIO clocks. This parameter is only available in STM32F469xx/STM32F479xx devices. This parameter must be a value of RCC PLLSAIP Clock Divider
uint32_t	PLLSAIQ	Specifies the division factor for SAI clock. This parameter must be a number between Min_Data = 2 and Max_Data = 15. This parameter will be used only when PLLSAI is selected as Clock Source SAI Specifies the division factor for SAI1 clock. This parameter must be a number between Min_Data = 2 and Max_Data = 15. This parameter will be used only when PLLSAI is selected as Clock Source SAI or LTDC
uint32_t	PLLSAIR	specifies the division factor for LTDC clock This parameter must be a number between Min_Data = 2 and Max_Data = 7. This parameter will be used only when PLLSAI is selected as Clock Source LTDC

RCC_PeriphCLKInitTypeDef

struct RCC_PeriphCLKInitTypeDef

RCC extended clocks structure definition.

Definition at line 121 of file stm32f4xx_hal_rcc_ex.h.

Collaboration diagram for RCC_PeriphCLKInitTypeDef:

Data Fields
uint32_t	CecClockSelection	Specifies CEC Clock Source Selection. This parameter can be a value of RCC CEC Clock Source
uint32_t	Clk48ClockSelection	Specifies CLK48 Clock Selection this clock used OTG FS, SDIO and RNG clocks. This parameter can be a value of RCC CLK48 Clock Source
uint32_t	Dfsdm1AudioClockSelection	Specifies DFSDM1 Audio Clock Selection. This parameter can be a value of RCC DFSDM1 Audio Clock Source
uint32_t	Dfsdm1ClockSelection	Specifies DFSDM1 Clock Selection. This parameter can be a value of RCC DFSDM1 Kernel Clock Source
uint32_t	Dfsdm2AudioClockSelection	Specifies DFSDM2 Audio Clock Selection. This parameter can be a value of RCC DFSDM2 Audio Clock Source
uint32_t	Dfsdm2ClockSelection	Specifies DFSDM2 Clock Selection. This parameter can be a value of RCC DFSDM2 Kernel Clock Source
uint32_t	Fmpi2c1ClockSelection	Specifies FMPI2C1 Clock Source Selection. This parameter can be a value of RCC FMPI2C1 Clock Source
uint32_t	I2sApb1ClockSelection	Specifies I2S APB1 Clock Source Selection. This parameter can be a value of RCC I2S APB1 Clock Source
uint32_t	I2sApb2ClockSelection	Specifies I2S APB2 Clock Source Selection. This parameter can be a value of RCC I2S APB2 Clock Source
uint32_t	I2SClockSelection	Specifies RTC Clock Source Selection. This parameter can be a value of RCC I2S APB Clock Source
uint32_t	Lptim1ClockSelection	Specifies LPTIM1 Clock Source Selection. This parameter can be a value of RCC LPTIM1 Clock Source
uint32_t	PeriphClockSelection	The Extended Clock to be configured. This parameter can be a value of RCC Periph Clock Selection
uint32_t	PLLDivR	Specifies the PLL division factor for SAI1 clock. This parameter must be a number between Min_Data = 1 and Max_Data = 32 This parameter will be used only when PLL is selected as Clock Source SAI
RCC_PLLI2SInitTypeDef	PLLI2S	PLL I2S structure parameters. This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI PLL I2S structure parameters. This parameter will be used only when PLLI2S is selected as Clock Source I2S
uint32_t	PLLI2SDivQ	Specifies the PLLI2S division factor for SAI1 clock. This parameter must be a number between Min_Data = 1 and Max_Data = 32 This parameter will be used only when PLLI2S is selected as Clock Source SAI
uint32_t	PLLI2SDivR	Specifies the PLLI2S division factor for SAI1 clock. This parameter must be a number between Min_Data = 1 and Max_Data = 32 This parameter will be used only when PLLI2S is selected as Clock Source SAI
uint32_t	PLLI2SSelection	Specifies PLL I2S Clock Source Selection. This parameter can be a value of PLL I2S Clock Source
RCC_PLLSAIInitTypeDef	PLLSAI	PLL SAI structure parameters. This parameter will be used only when PLLI2S is selected as Clock Source SAI or LTDC
uint32_t	PLLSAIDivQ	Specifies the PLLI2S division factor for SAI1 clock. This parameter must be a number between Min_Data = 1 and Max_Data = 32 This parameter will be used only when PLLSAI is selected as Clock Source SAI
uint32_t	PLLSAIDivR	Specifies the PLLSAI division factor for LTDC clock. This parameter must be one value of RCC PLLSAI DIVR
uint32_t	RTCClockSelection	Specifies RTC Clock Source Selection. This parameter can be a value of RTC Clock Source Specifies RTC Clock Prescalers Selection. This parameter can be a value of RTC Clock Source
uint32_t	Sai1ClockSelection	Specifies SAI1 Clock Source Selection. This parameter can be a value of RCC SAI1 Clock Source
uint32_t	Sai2ClockSelection	Specifies SAI2 Clock Source Selection. This parameter can be a value of RCC SAI2 Clock Source
uint32_t	SaiAClockSelection	Specifies SAI1_A Clock Prescalers Selection This parameter can be a value of RCC SAI BlockA Clock Source
uint32_t	SaiBClockSelection	Specifies SAI1_B Clock Prescalers Selection This parameter can be a value of RCC SAI BlockB Clock Source
uint32_t	SdioClockSelection	Specifies SDIO Clock Source Selection. This parameter can be a value of RCC SDIO Clock Source
uint32_t	SpdifClockSelection	Specifies SPDIFRX Clock Source Selection. This parameter can be a value of RCC SPDIFRX Clock Source
uint8_t	TIMPresSelection	Specifies TIM Clock Source Selection. This parameter can be a value of RCC TIM PRescaler Selection Specifies TIM Clock Prescalers Selection. This parameter can be a value of RCC TIM PRescaler Selection