STM32F4xx_HAL_Driver  1.8.3
Functions
AHB2
STM32F4xx_LL_Driver » BUS » BUS Exported Functions
+ Collaboration diagram for AHB2:

Functions

__STATIC_INLINE void LL_AHB2_GRP1_EnableClock (uint32_t Periphs)
 Enable AHB2 peripherals clock. @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_EnableClock
AHB2ENR CRYPEN LL_AHB2_GRP1_EnableClock
AHB2ENR AESEN LL_AHB2_GRP1_EnableClock
AHB2ENR HASHEN LL_AHB2_GRP1_EnableClock
AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock
AHB2ENR OTGFSEN LL_AHB2_GRP1_EnableClock. More...
 
__STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock (uint32_t Periphs)
 Check if AHB2 peripheral clock is enabled or not @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR CRYPEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR HASHEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR RNGEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR OTGFSEN LL_AHB2_GRP1_IsEnabledClock. More...
 
__STATIC_INLINE void LL_AHB2_GRP1_DisableClock (uint32_t Periphs)
 Disable AHB2 peripherals clock. @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock
AHB2ENR CRYPEN LL_AHB2_GRP1_DisableClock
AHB2ENR AESEN LL_AHB2_GRP1_DisableClock
AHB2ENR HASHEN LL_AHB2_GRP1_DisableClock
AHB2ENR RNGEN LL_AHB2_GRP1_DisableClock
AHB2ENR OTGFSEN LL_AHB2_GRP1_DisableClock. More...
 
__STATIC_INLINE void LL_AHB2_GRP1_ForceReset (uint32_t Periphs)
 Force AHB2 peripherals reset. @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ForceReset
AHB2RSTR CRYPRST LL_AHB2_GRP1_ForceReset
AHB2RSTR AESRST LL_AHB2_GRP1_ForceReset
AHB2RSTR HASHRST LL_AHB2_GRP1_ForceReset
AHB2RSTR RNGRST LL_AHB2_GRP1_ForceReset
AHB2RSTR OTGFSRST LL_AHB2_GRP1_ForceReset. More...
 
__STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset (uint32_t Periphs)
 Release AHB2 peripherals reset. @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR CRYPRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR RNGRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR OTGFSRST LL_AHB2_GRP1_ReleaseReset. More...
 
__STATIC_INLINE void LL_AHB2_GRP1_EnableClockLowPower (uint32_t Periphs)
 Enable AHB2 peripheral clocks in low-power mode @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR CRYPLPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR AESLPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR HASHLPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR RNGLPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_EnableClockLowPower. More...
 
__STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower (uint32_t Periphs)
 Disable AHB2 peripheral clocks in low-power mode @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR CRYPLPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR RNGLPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_DisableClockLowPower. More...
 

Detailed Description

Function Documentation

◆ LL_AHB2_GRP1_DisableClock()

__STATIC_INLINE void LL_AHB2_GRP1_DisableClock ( uint32_t  Periphs)

Disable AHB2 peripherals clock. @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock
AHB2ENR CRYPEN LL_AHB2_GRP1_DisableClock
AHB2ENR AESEN LL_AHB2_GRP1_DisableClock
AHB2ENR HASHEN LL_AHB2_GRP1_DisableClock
AHB2ENR RNGEN LL_AHB2_GRP1_DisableClock
AHB2ENR OTGFSEN LL_AHB2_GRP1_DisableClock.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB2_GRP1_PERIPH_DCMI (*)
  • LL_AHB2_GRP1_PERIPH_CRYP (*)
  • LL_AHB2_GRP1_PERIPH_AES (*)
  • LL_AHB2_GRP1_PERIPH_HASH (*)
  • LL_AHB2_GRP1_PERIPH_RNG (*)
  • LL_AHB2_GRP1_PERIPH_OTGFS (*)
(*) value not defined in all devices.
Return values
None

Definition at line 854 of file stm32f4xx_ll_bus.h.

◆ LL_AHB2_GRP1_DisableClockLowPower()

__STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower ( uint32_t  Periphs)

Disable AHB2 peripheral clocks in low-power mode @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR CRYPLPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR RNGLPEN LL_AHB2_GRP1_DisableClockLowPower
AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_DisableClockLowPower.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB2_GRP1_PERIPH_DCMI (*)
  • LL_AHB2_GRP1_PERIPH_CRYP (*)
  • LL_AHB2_GRP1_PERIPH_AES (*)
  • LL_AHB2_GRP1_PERIPH_HASH (*)
  • LL_AHB2_GRP1_PERIPH_RNG (*)
  • LL_AHB2_GRP1_PERIPH_OTGFS (*)
(*) value not defined in all devices.
Return values
None

Definition at line 956 of file stm32f4xx_ll_bus.h.

◆ LL_AHB2_GRP1_EnableClock()

__STATIC_INLINE void LL_AHB2_GRP1_EnableClock ( uint32_t  Periphs)

Enable AHB2 peripherals clock. @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_EnableClock
AHB2ENR CRYPEN LL_AHB2_GRP1_EnableClock
AHB2ENR AESEN LL_AHB2_GRP1_EnableClock
AHB2ENR HASHEN LL_AHB2_GRP1_EnableClock
AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock
AHB2ENR OTGFSEN LL_AHB2_GRP1_EnableClock.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB2_GRP1_PERIPH_DCMI (*)
  • LL_AHB2_GRP1_PERIPH_CRYP (*)
  • LL_AHB2_GRP1_PERIPH_AES (*)
  • LL_AHB2_GRP1_PERIPH_HASH (*)
  • LL_AHB2_GRP1_PERIPH_RNG (*)
  • LL_AHB2_GRP1_PERIPH_OTGFS (*)
(*) value not defined in all devices.
Return values
None

Definition at line 802 of file stm32f4xx_ll_bus.h.

◆ LL_AHB2_GRP1_EnableClockLowPower()

__STATIC_INLINE void LL_AHB2_GRP1_EnableClockLowPower ( uint32_t  Periphs)

Enable AHB2 peripheral clocks in low-power mode @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR CRYPLPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR AESLPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR HASHLPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR RNGLPEN LL_AHB2_GRP1_EnableClockLowPower
AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_EnableClockLowPower.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB2_GRP1_PERIPH_DCMI (*)
  • LL_AHB2_GRP1_PERIPH_CRYP (*)
  • LL_AHB2_GRP1_PERIPH_AES (*)
  • LL_AHB2_GRP1_PERIPH_HASH (*)
  • LL_AHB2_GRP1_PERIPH_RNG (*)
  • LL_AHB2_GRP1_PERIPH_OTGFS (*)
(*) value not defined in all devices.
Return values
None

Definition at line 928 of file stm32f4xx_ll_bus.h.

◆ LL_AHB2_GRP1_ForceReset()

__STATIC_INLINE void LL_AHB2_GRP1_ForceReset ( uint32_t  Periphs)

Force AHB2 peripherals reset. @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ForceReset
AHB2RSTR CRYPRST LL_AHB2_GRP1_ForceReset
AHB2RSTR AESRST LL_AHB2_GRP1_ForceReset
AHB2RSTR HASHRST LL_AHB2_GRP1_ForceReset
AHB2RSTR RNGRST LL_AHB2_GRP1_ForceReset
AHB2RSTR OTGFSRST LL_AHB2_GRP1_ForceReset.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB2_GRP1_PERIPH_ALL
  • LL_AHB2_GRP1_PERIPH_DCMI (*)
  • LL_AHB2_GRP1_PERIPH_CRYP (*)
  • LL_AHB2_GRP1_PERIPH_AES (*)
  • LL_AHB2_GRP1_PERIPH_HASH (*)
  • LL_AHB2_GRP1_PERIPH_RNG (*)
  • LL_AHB2_GRP1_PERIPH_OTGFS (*)
(*) value not defined in all devices.
Return values
None

Definition at line 879 of file stm32f4xx_ll_bus.h.

◆ LL_AHB2_GRP1_IsEnabledClock()

__STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock ( uint32_t  Periphs)

Check if AHB2 peripheral clock is enabled or not @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR CRYPEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR HASHEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR RNGEN LL_AHB2_GRP1_IsEnabledClock
AHB2ENR OTGFSEN LL_AHB2_GRP1_IsEnabledClock.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB2_GRP1_PERIPH_DCMI (*)
  • LL_AHB2_GRP1_PERIPH_CRYP (*)
  • LL_AHB2_GRP1_PERIPH_AES (*)
  • LL_AHB2_GRP1_PERIPH_HASH (*)
  • LL_AHB2_GRP1_PERIPH_RNG (*)
  • LL_AHB2_GRP1_PERIPH_OTGFS (*)
(*) value not defined in all devices.
Return values
Stateof Periphs (1 or 0).

Definition at line 830 of file stm32f4xx_ll_bus.h.

◆ LL_AHB2_GRP1_ReleaseReset()

__STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset ( uint32_t  Periphs)

Release AHB2 peripherals reset. @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR CRYPRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR RNGRST LL_AHB2_GRP1_ReleaseReset
AHB2RSTR OTGFSRST LL_AHB2_GRP1_ReleaseReset.

Parameters
PeriphsThis parameter can be a combination of the following values:
  • LL_AHB2_GRP1_PERIPH_ALL
  • LL_AHB2_GRP1_PERIPH_DCMI (*)
  • LL_AHB2_GRP1_PERIPH_CRYP (*)
  • LL_AHB2_GRP1_PERIPH_AES (*)
  • LL_AHB2_GRP1_PERIPH_HASH (*)
  • LL_AHB2_GRP1_PERIPH_RNG (*)
  • LL_AHB2_GRP1_PERIPH_OTGFS (*)
(*) value not defined in all devices.
Return values
None

Definition at line 904 of file stm32f4xx_ll_bus.h.