Enable or disable the Low Speed APB (APB1) peripheral clock.

Collaboration diagram for APB1 Peripheral Clock Enable Disable:

Enable or disable the Low Speed APB (APB1) peripheral clock.

Enable or disable the High Speed APB (APB1) peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.